From patchwork Wed Aug 26 18:02:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 7079121 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 222AB9F1C0 for ; Wed, 26 Aug 2015 18:02:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 379A520953 for ; Wed, 26 Aug 2015 18:02:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4D6B02094D for ; Wed, 26 Aug 2015 18:02:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756105AbbHZSCb (ORCPT ); Wed, 26 Aug 2015 14:02:31 -0400 Received: from andre.telenet-ops.be ([195.130.132.53]:35579 "EHLO andre.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756072AbbHZSC2 (ORCPT ); Wed, 26 Aug 2015 14:02:28 -0400 Received: from ayla.of.borg ([31.5.182.137]) by andre.telenet-ops.be with bizsmtp id 9W2R1r00J2yGKqv01W2RZA; Wed, 26 Aug 2015 20:02:26 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1ZUf1l-0004Fp-46; Wed, 26 Aug 2015 20:02:25 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1ZUf1n-0004P0-Jx; Wed, 26 Aug 2015 20:02:27 +0200 From: Geert Uytterhoeven To: Kuninori Morimoto , Takeshi Kihara , Laurent Pinchart , Linus Walleij , Simon Horman , Magnus Damm Cc: linux-sh@vger.kernel.org, linux-gpio@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 1/5] pinctrl: sh-pfc: r8a7795: Fix and extend SCIF0 pin data Date: Wed, 26 Aug 2015 20:02:20 +0200 Message-Id: <1440612144-16877-2-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1440612144-16877-1-git-send-email-geert+renesas@glider.be> References: <1440612144-16877-1-git-send-email-geert+renesas@glider.be> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP - Fix SCIF0 SCK pin and mux: "SCIF_CLK_B" is not an alternative SCK pin, but the alternative (H)SCIF baud rate generation clock pin, which is not yet supported, - Add missing SCIF0 ctrl pins. Signed-off-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c index 9437e87cc8065211..459929d215f9b8aa 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c @@ -2243,12 +2243,19 @@ static const unsigned int scif0_data_pins[] = { static const unsigned int scif0_data_mux[] = { RX0_MARK, TX0_MARK, }; -static const unsigned int scif0_clk_b_pins[] = { +static const unsigned int scif0_clk_pins[] = { /* SCK */ - RCAR_GP_PIN(5, 9), + RCAR_GP_PIN(5, 0), +}; +static const unsigned int scif0_clk_mux[] = { + SCK0_MARK, +}; +static const unsigned int scif0_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3), }; -static const unsigned int scif0_clk_b_mux[] = { - SCIF_CLK_B_MARK, +static const unsigned int scif0_ctrl_mux[] = { + RTS0_N_TANS_MARK, CTS0_N_MARK, }; /* - SCIF1 ------------------------------------------------------------------ */ static const unsigned int scif1_data_a_pins[] = { @@ -2780,7 +2787,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(msiof3_txd_d), SH_PFC_PIN_GROUP(msiof3_rxd_d), SH_PFC_PIN_GROUP(scif0_data), - SH_PFC_PIN_GROUP(scif0_clk_b), + SH_PFC_PIN_GROUP(scif0_clk), + SH_PFC_PIN_GROUP(scif0_ctrl), SH_PFC_PIN_GROUP(scif1_data_a), SH_PFC_PIN_GROUP(scif1_clk), SH_PFC_PIN_GROUP(scif1_ctrl), @@ -2972,7 +2980,8 @@ static const char * const msiof3_groups[] = { static const char * const scif0_groups[] = { "scif0_data", - "scif0_clk_b", + "scif0_clk", + "scif0_ctrl", }; static const char * const scif1_groups[] = {