From patchwork Wed Oct 28 23:09:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 7515231 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 01066BEEA4 for ; Wed, 28 Oct 2015 23:09:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2BADB20978 for ; Wed, 28 Oct 2015 23:09:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1C47920979 for ; Wed, 28 Oct 2015 23:09:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756438AbbJ1XJm (ORCPT ); Wed, 28 Oct 2015 19:09:42 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:34496 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756350AbbJ1XJm (ORCPT ); Wed, 28 Oct 2015 19:09:42 -0400 Received: from penelope.kanocho.kobe.vergenet.net (q036059.ppp.asahi-net.or.jp [203.181.36.59]) by kirsty.vergenet.net (Postfix) with ESMTPSA id 9809425B81E; Thu, 29 Oct 2015 10:09:37 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1446073777; bh=ABl7t0EYaq8y8feGVx/kJFFrFlkZAl5fNrQ2XXlfvkw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m4mM7vueKCQVseLE5qauPyYTd364gxF/miE7IPw0qGx92AA+ljGtKJU6/A6fKvroO TjzGZlDsdz65X7MAiZ14tBhieRIvxp6OyUQ1xyDi4u6+8Q5Nsl22S+aJ3pSgRtMIn+ 09QuCwo/bzeRxKfMhOMMo+ep/bE46bMS/w/bx6n8= Received: by penelope.kanocho.kobe.vergenet.net (Postfix, from userid 7100) id 7C067604ED; Thu, 29 Oct 2015 08:09:36 +0900 (JST) From: Simon Horman To: linux-sh@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Ulrich Hecht , Geert Uytterhoeven Subject: [PATCH v3 1/2] arm64: dts: r8a7795: add GPIO nodes Date: Thu, 29 Oct 2015 08:09:18 +0900 Message-Id: <1446073759-10569-2-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1446073759-10569-1-git-send-email-horms+renesas@verge.net.au> References: <1446073759-10569-1-git-send-email-horms+renesas@verge.net.au> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Takeshi Kihara Signed-off-by: Takeshi Kihara Signed-off-by: Ulrich Hecht Signed-off-by: Simon Horman Acked-by: by: Geert Uytterhoeven --- v3 [Simon Horman] * Corrected gpio-ranges as suggested by Geert Uytterhoeven v2 [Simon Horman] * Update for new CPG/MSSR bindings via Geert Uytterhoeven v1 [Ulrich Hecht] * Corrected gpio 6/7 clocks v0 [Simon Horman] * Broke out of lager patch * Moved gpio nodes to soc node --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 112 +++++++++++++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index b94e5a9e2c3b..b5eee9ff7229 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -59,6 +59,118 @@ (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; }; + gpio0: gpio@e6050000 { + compatible = "renesas,gpio-r8a7795", + "renesas,gpio-rcar"; + reg = <0 0xe6050000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 0 16>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 912>; + power-domains = <&cpg>; + }; + + gpio1: gpio@e6051000 { + compatible = "renesas,gpio-r8a7795", + "renesas,gpio-rcar"; + reg = <0 0xe6051000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 32 28>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 911>; + power-domains = <&cpg>; + }; + + gpio2: gpio@e6052000 { + compatible = "renesas,gpio-r8a7795", + "renesas,gpio-rcar"; + reg = <0 0xe6052000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 64 15>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 910>; + power-domains = <&cpg>; + }; + + gpio3: gpio@e6053000 { + compatible = "renesas,gpio-r8a7795", + "renesas,gpio-rcar"; + reg = <0 0xe6053000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 96 16>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 909>; + power-domains = <&cpg>; + }; + + gpio4: gpio@e6054000 { + compatible = "renesas,gpio-r8a7795", + "renesas,gpio-rcar"; + reg = <0 0xe6054000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 128 18>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 908>; + power-domains = <&cpg>; + }; + + gpio5: gpio@e6055000 { + compatible = "renesas,gpio-r8a7795", + "renesas,gpio-rcar"; + reg = <0 0xe6055000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 160 26>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 907>; + power-domains = <&cpg>; + }; + + gpio6: gpio@e6055400 { + compatible = "renesas,gpio-r8a7795", + "renesas,gpio-rcar"; + reg = <0 0xe6055400 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 192 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 906>; + power-domains = <&cpg>; + }; + + gpio7: gpio@e6055800 { + compatible = "renesas,gpio-r8a7795", + "renesas,gpio-rcar"; + reg = <0 0xe6055800 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 224 4>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 905>; + power-domains = <&cpg>; + }; + timer { compatible = "arm,armv8-timer"; interrupts =