From patchwork Sat Dec 12 07:16:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Behme X-Patchwork-Id: 7834211 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 603CB9F1C2 for ; Sat, 12 Dec 2015 07:17:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 98C8620414 for ; Sat, 12 Dec 2015 07:17:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0D2F22041E for ; Sat, 12 Dec 2015 07:17:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751151AbbLLHRK (ORCPT ); Sat, 12 Dec 2015 02:17:10 -0500 Received: from mail-wm0-f46.google.com ([74.125.82.46]:33077 "EHLO mail-wm0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751084AbbLLHQy (ORCPT ); Sat, 12 Dec 2015 02:16:54 -0500 Received: by mail-wm0-f46.google.com with SMTP id c201so98785754wme.0; Fri, 11 Dec 2015 23:16:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qnlnvSxTJfgWPEJloW4cUTktBXHmRAbLCEh7BZKcuRM=; b=GuoafjD+l8vudqyNM11qPFULQQaLvp7VsH9WWuUwa80ghNNSRyfFrIDCbZALBpBcF1 0dQT3p8dJXUWERWL4b08RuWAGRwUcV84n+5wFHaRcKhqBCs6/BDcYWVP42DrUk2uw0GV MFVP8Pa/fmL4GPHPbElIJy63ZCYG9AU96FovZ/D3VK2XhENAU1hDPibbvcF+rSYA6EjQ ajUVkL+efdszRdiU6NfZXCO2VXl10xoEGeBt2/MzSYhIAwm2qHANgEEvD+dGdivrWCOv nvGDDtU00XHGdr1PQHdwrhVIUZb6qBfoj60H/YJqDs5Z9qkYd4yXhWtM9k/932GTb7Cm wcPQ== X-Received: by 10.28.195.10 with SMTP id t10mr10345193wmf.11.1449904613154; Fri, 11 Dec 2015 23:16:53 -0800 (PST) Received: from localhost.localdomain (p4FEE252A.dip0.t-ipconnect.de. [79.238.37.42]) by smtp.gmail.com with ESMTPSA id gl10sm20020317wjb.30.2015.12.11.23.16.51 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 11 Dec 2015 23:16:52 -0800 (PST) From: Dirk Behme To: linux-sh@vger.kernel.org, horms@verge.net.au, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dirk Behme Subject: [PATCH 2/2] arm64: dts: r8a7795: Add L2 cache-controller nodes Date: Sat, 12 Dec 2015 08:16:47 +0100 Message-Id: <1449904607-4060-2-git-send-email-dirk.behme@gmail.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1449904607-4060-1-git-send-email-dirk.behme@gmail.com> References: <1449904607-4060-1-git-send-email-dirk.behme@gmail.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven Add device nodes for the L2 caches, and link the CPU node to its L2 cache node. The L2 cache for the Cortex-A57 CPU cores is 2 MiB large (organized as 128 KiB x 16 ways). The L2 cache for the Cortex-A53 CPU cores is 512 KiB large (organized as 32 KiB x 16 ways). Signed-off-by: Geert Uytterhoeven Signed-off-by: Dirk Behme --- Note: Geert: I picked your patch from http://www.spinics.net/lists/arm-kernel/msg466628.html incoporated some review comments and rebased it against https://git.kernel.org/cgit/linux/kernel/git/horms/renesas.git/log/?h=next renesas-next-20151211v2-v4.4-rc1 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 3633a2a..d63a70f 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -39,6 +39,7 @@ compatible = "arm,cortex-a57", "arm,armv8"; reg = <0x0>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -46,46 +47,61 @@ compatible = "arm,cortex-a57","arm,armv8"; reg = <0x1>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; a57_2: cpu@2 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x2>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; a57_3: cpu@3 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x3>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; a53_0: cpu@100 { compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x100>; device_type = "cpu"; + next-level-cache = <&L2_CA53>; enable-method = "psci"; }; a53_1: cpu@101 { compatible = "arm,cortex-a53","arm,armv8"; reg = <0x101>; device_type = "cpu"; + next-level-cache = <&L2_CA53>; enable-method = "psci"; }; a53_2: cpu@102 { compatible = "arm,cortex-a53","arm,armv8"; reg = <0x102>; device_type = "cpu"; + next-level-cache = <&L2_CA53>; enable-method = "psci"; }; a53_3: cpu@103 { compatible = "arm,cortex-a53","arm,armv8"; reg = <0x103>; device_type = "cpu"; + next-level-cache = <&L2_CA53>; enable-method = "psci"; }; }; + L2_CA57: cache-controller@0 { + compatible = "cache"; + }; + + L2_CA53: cache-controller@1 { + compatible = "cache"; + }; + extal_clk: extal { compatible = "fixed-clock"; #clock-cells = <0>;