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[v2,3/9] ARM: shmobile: gose dts: Enable SCIF_CLK frequency and pins

Message ID 1450119504-1517-4-git-send-email-geert+renesas@glider.be (mailing list archive)
State Deferred
Delegated to: Simon Horman
Headers show

Commit Message

Geert Uytterhoeven Dec. 14, 2015, 6:58 p.m. UTC
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Untested, based on (non)differences in U-Boot sources between koelsch
and gose.

v2:
  - New.
---
 arch/arm/boot/dts/r8a7793-gose.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)
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Patch

diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index 3e3122490650d140..077ab9423f5e17d6 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -38,6 +38,9 @@ 
 };
 
 &pfc {
+	pinctrl-0 = <&scif_clk_pins>;
+	pinctrl-names = "default";
+
 	scif0_pins: serial0 {
 		renesas,groups = "scif0_data_d";
 		renesas,function = "scif0";
@@ -48,6 +51,11 @@ 
 		renesas,function = "scif1";
 	};
 
+	scif_clk_pins: scif_clk {
+		renesas,groups = "scif_clk";
+		renesas,function = "scif_clk";
+	};
+
 	ether_pins: ether {
 		renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
 		renesas,function = "eth";
@@ -98,6 +106,11 @@ 
 	status = "okay";
 };
 
+&scif_clk {
+	clock-frequency = <14745600>;
+	status = "okay";
+};
+
 &qspi {
 	pinctrl-0 = <&qspi_pins>;
 	pinctrl-names = "default";