| Message ID | 1451044361-5896-2-git-send-email-yoshihiro.shimoda.uh@renesas.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Commit | 43a492dfe6ad058478dda652b7fbf2d63415396b |
| Delegated to: | Simon Horman |
| Headers | show |
Hi Shimoda-san, On Fri, Dec 25, 2015 at 12:52 PM, Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote: > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > --- > arch/arm64/boot/dts/renesas/r8a7795.dtsi | 34 ++++++++++++++++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > index bb353cd..89393ea 100644 > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > @@ -775,5 +775,39 @@ > clocks = <&cpg CPG_MOD 815>; > status = "disabled"; > }; > + > + usb2_phy0: usb-phy@ee080200 { > + compatible = "renesas,usb2-phy-r8a7795"; > + reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>; > + reg-names = "usb2_host", "hsusb"; > + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; Isn't 108 the EHCI0 interrupt? Cfr. the other usb-phy nodes that don't have interrupts. > + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; > + clock-names = "usb2", "hsusb"; > + power-domains = <&cpg>; This device has two modules clocks, but the CPG/MSSR driver only manages the first modulo clock. Who enables the second clock (HS-USB-IF)? > + #phy-cells = <0>; > + status = "disabled"; > + }; > + > + usb2_phy1: usb-phy@ee0a0200 { > + compatible = "renesas,usb2-phy-r8a7795"; > + reg = <0 0xee0a0200 0 0x700>; > + reg-names = "usb2_host"; > + clocks = <&cpg CPG_MOD 702>; > + clock-names = "usb2"; > + power-domains = <&cpg>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > + > + usb2_phy2: usb-phy@ee0c0200 { > + compatible = "renesas,usb2-phy-r8a7795"; > + reg = <0 0xee0c0200 0 0x700>; > + reg-names = "usb2_host"; > + clocks = <&cpg CPG_MOD 701>; > + clock-names = "usb2"; > + power-domains = <&cpg>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > }; > }; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Geert-san, Thank you for your comment and sorry for the delayed response. > From: Geert Uytterhoeven > Sent: Monday, January 04, 2016 9:42 PM > > On Fri, Dec 25, 2015 at 12:52 PM, Yoshihiro Shimoda > <yoshihiro.shimoda.uh@renesas.com> wrote: > > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > > @@ -775,5 +775,39 @@ > > clocks = <&cpg CPG_MOD 815>; > > status = "disabled"; > > }; > > + > > + usb2_phy0: usb-phy@ee080200 { > > + compatible = "renesas,usb2-phy-r8a7795"; > > + reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>; > > + reg-names = "usb2_host", "hsusb"; > > + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > Isn't 108 the EHCI0 interrupt? > Cfr. the other usb-phy nodes that don't have interrupts. Yes, 108 is the EHCI0 interrupt. However, as the 73.5.1 Interrupt Signal List in the datasheet is described, this EHCI0 has also phy interrupt (the datasheet names "UCON"). > > + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; > > + clock-names = "usb2", "hsusb"; > > + power-domains = <&cpg>; > > This device has two modules clocks, but the CPG/MSSR driver only manages > the first modulo clock. > Who enables the second clock (HS-USB-IF)? Oops! Thank you for the point. The second clock was enabled by a boot loader. If a boot loader doesn't enable this clock, a panic happens as the followings in probing timing of the renesas-hsusb driver: renesas_usbhs e6590000.usb: transceiver found renesas_usbhs e6590000.usb: gadget probed Bad mode in Error handler detected, code 0xbf000002 -- SError CPU: 3 PID: 1 Comm: swapper/0 Not tainted 4.4.0-rc6+ #42 Hardware name: Renesas Salvator-X board based on r8a7795 (DT) task: ffffffc031868000 ti: ffffffc031870000 task.ti: ffffffc031870000 PC is at rcar_gen3_phy_usb2_init+0x38/0x114 LR is at phy_init+0x60/0xcc So, I will fix this issue somehow. Also, I would like to revert this patch set to avoid any troubles. Simon-san, would you revert this patch set? Best regards, Yoshihiro Shimoda > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
On Thu, Jan 07, 2016 at 01:47:47AM +0000, Yoshihiro Shimoda wrote: > Hi Geert-san, > > Thank you for your comment and sorry for the delayed response. > > > From: Geert Uytterhoeven > > Sent: Monday, January 04, 2016 9:42 PM > > > > On Fri, Dec 25, 2015 at 12:52 PM, Yoshihiro Shimoda > > <yoshihiro.shimoda.uh@renesas.com> wrote: > > > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi > > > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > > > @@ -775,5 +775,39 @@ > > > clocks = <&cpg CPG_MOD 815>; > > > status = "disabled"; > > > }; > > > + > > > + usb2_phy0: usb-phy@ee080200 { > > > + compatible = "renesas,usb2-phy-r8a7795"; > > > + reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>; > > > + reg-names = "usb2_host", "hsusb"; > > > + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > > > Isn't 108 the EHCI0 interrupt? > > Cfr. the other usb-phy nodes that don't have interrupts. > > Yes, 108 is the EHCI0 interrupt. > However, as the 73.5.1 Interrupt Signal List in the datasheet is described, > this EHCI0 has also phy interrupt (the datasheet names "UCON"). > > > > + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; > > > + clock-names = "usb2", "hsusb"; > > > + power-domains = <&cpg>; > > > > This device has two modules clocks, but the CPG/MSSR driver only manages > > the first modulo clock. > > Who enables the second clock (HS-USB-IF)? > > Oops! Thank you for the point. > The second clock was enabled by a boot loader. > If a boot loader doesn't enable this clock, > a panic happens as the followings in probing timing of the renesas-hsusb driver: > > renesas_usbhs e6590000.usb: transceiver found > renesas_usbhs e6590000.usb: gadget probed > Bad mode in Error handler detected, code 0xbf000002 -- SError > CPU: 3 PID: 1 Comm: swapper/0 Not tainted 4.4.0-rc6+ #42 > Hardware name: Renesas Salvator-X board based on r8a7795 (DT) > task: ffffffc031868000 ti: ffffffc031870000 task.ti: ffffffc031870000 > PC is at rcar_gen3_phy_usb2_init+0x38/0x114 > LR is at phy_init+0x60/0xcc > > So, I will fix this issue somehow. > Also, I would like to revert this patch set to avoid any troubles. > Simon-san, would you revert this patch set? Sure, I will drop the entire patchset. -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index bb353cd..89393ea 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -775,5 +775,39 @@ clocks = <&cpg CPG_MOD 815>; status = "disabled"; }; + + usb2_phy0: usb-phy@ee080200 { + compatible = "renesas,usb2-phy-r8a7795"; + reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>; + reg-names = "usb2_host", "hsusb"; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; + clock-names = "usb2", "hsusb"; + power-domains = <&cpg>; + #phy-cells = <0>; + status = "disabled"; + }; + + usb2_phy1: usb-phy@ee0a0200 { + compatible = "renesas,usb2-phy-r8a7795"; + reg = <0 0xee0a0200 0 0x700>; + reg-names = "usb2_host"; + clocks = <&cpg CPG_MOD 702>; + clock-names = "usb2"; + power-domains = <&cpg>; + #phy-cells = <0>; + status = "disabled"; + }; + + usb2_phy2: usb-phy@ee0c0200 { + compatible = "renesas,usb2-phy-r8a7795"; + reg = <0 0xee0c0200 0 0x700>; + reg-names = "usb2_host"; + clocks = <&cpg CPG_MOD 701>; + clock-names = "usb2"; + power-domains = <&cpg>; + #phy-cells = <0>; + status = "disabled"; + }; }; };
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 34 ++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)