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[1/8] devicetree: binding: R-car Gen3 CMT0 and CMT1 bindings

Message ID 1473421394-9745-2-git-send-email-bd-phuc@jinso.co.jp
State New
Headers show

Commit Message

bd-phuc@jinso.co.jp Sept. 9, 2016, 11:43 a.m. UTC
From: Bui Duc Phuc <bd-phuc@jinso.co.jp>

Add documentation for new separate CMT0 and CMT1 DT compatible strings
for R-Car Gen3.

Signed-off-by: Bui Duc Phuc <bd-phuc@jinso.co.jp>
---
 Documentation/devicetree/bindings/timer/renesas,cmt.txt | 2 ++
 1 file changed, 2 insertions(+)

Comments

Geert Uytterhoeven Sept. 9, 2016, 12:07 p.m. UTC | #1
Hi Phuc-san,

On Fri, Sep 9, 2016 at 1:43 PM,  <bd-phuc@jinso.co.jp> wrote:
> Add documentation for new separate CMT0 and CMT1 DT compatible strings
> for R-Car Gen3.
>
> Signed-off-by: Bui Duc Phuc <bd-phuc@jinso.co.jp>
> ---
>  Documentation/devicetree/bindings/timer/renesas,cmt.txt | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
> index 1a05c1b..72fd526 100644
> --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
> +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
> @@ -52,6 +52,8 @@ Required Properties:
>                 (CMT[01] on r8a73a4, r8a7790 and r8a7791)
>                 This is a fallback for the renesas,cmt-48-r8a73a4,
>                 renesas,cmt-48-r8a7790 and renesas,cmt-48-r8a7791 entries.
> +    - "renesas,cmt-48-gen3" for third generation 48-bit CMT
> +               (CMT[01] on r8a7795 and r8a7796)

I think the plan was to get rid of the renesas,cmt-48-* bindings, as they do
not allow to differentiate between CMT0 and CMT1, which have different feature
sets.

Cfr. Magnus' series "clocksource: sh_cmt: DT binding rework V4"
(https://lkml.org/lkml/2016/3/14/433).

Magnus: What's the status of your series?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

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bd-phuc@jinso.co.jp Sept. 12, 2016, 3:12 p.m. UTC | #2
Dear Geert,

> I think the plan was to get rid of the renesas,cmt-48-* bindings, as they do
> not allow to differentiate between CMT0 and CMT1, which have different feature
> sets.
>
> Cfr. Magnus' series "clocksource: sh_cmt: DT binding rework V4"
> (https://lkml.org/lkml/2016/3/14/433).
>
> Magnus: What's the status of your series?
Thank for your comments. I will update in V2.
I am still waiting for Magnus's comments, but from my point of 
view,Magnus's patches seem
support 32 bit counter only, they are not suitable for 48bit counter.
According to hardware manual, there has to be registers ( CMCSRH, 
CMCNTH,CMCORH) set for 48 bit counter,
but I do not see the registers ( CMCSRH, CMCNTH,CMCORH) in Magnus's patches.
diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
index 1a05c1b..72fd526 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
@@ -52,6 +52,8 @@  Required Properties:
 		(CMT[01] on r8a73a4, r8a7790 and r8a7791)
 		This is a fallback for the renesas,cmt-48-r8a73a4,
 		renesas,cmt-48-r8a7790 and renesas,cmt-48-r8a7791 entries.
+    - "renesas,cmt-48-gen3" for third generation 48-bit CMT
+		(CMT[01] on r8a7795 and r8a7796)
 
   - reg: base address and length of the registers block for the timer module.
   - interrupts: interrupt-specifier for the timer, one per channel.