From patchwork Thu May 7 10:55:37 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 22305 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n47AwQrl032570 for ; Thu, 7 May 2009 10:58:27 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751094AbZEGK6Y (ORCPT ); Thu, 7 May 2009 06:58:24 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752310AbZEGK6Y (ORCPT ); Thu, 7 May 2009 06:58:24 -0400 Received: from rv-out-0506.google.com ([209.85.198.232]:43338 "EHLO rv-out-0506.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751094AbZEGK6X (ORCPT ); Thu, 7 May 2009 06:58:23 -0400 Received: by rv-out-0506.google.com with SMTP id f9so550623rvb.1 for ; Thu, 07 May 2009 03:58:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:date:message-id :subject; bh=EdsgAYz4W54HFa1FNoYTpznmXdoIC2giBZ7heF+XGiQ=; b=YdBQxRMantsklu7xUN3m+aE/3qp8rueBoge6fSlFILuGBAMbg4qDv9NbHG7/24H139 dPSVL+qc23znT3XXWKp1sWIEMKKAE3RXqIaW0E1zh0x9KyeG18+gub/LQ/PA+benciHu IWUGGPooRnhhPxnDUMHfumpnn2JkuQ7BNYzvs= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:date:message-id:subject; b=xeW/9c8xtqEsEcuKLY6IGuQUqQd3XmnRoBHdM1G+iJih7yIbZ+UI5PCx8J+OXhaaK+ G6JkX3rkpuzn0YW350+WQfY+4+mdFyakY9AQ2fbiXsyhd6u/2LTFvTKThnoXOlnq68GQ wyccc1fYYxJxCeihLRF/u+7xe/jbYmXdY6YI0= Received: by 10.115.48.12 with SMTP id a12mr2165531wak.167.1241693904229; Thu, 07 May 2009 03:58:24 -0700 (PDT) Received: from rx1.opensource.se (210.5.32.202.bf.2iij.net [202.32.5.210]) by mx.google.com with ESMTPS id l37sm14701309waf.5.2009.05.07.03.58.21 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 07 May 2009 03:58:22 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Cc: Magnus Damm , lethal@linux-sh.org Date: Thu, 07 May 2009 19:55:37 +0900 Message-Id: <20090507105537.32064.15406.sendpatchset@rx1.opensource.se> Subject: [PATCH] sh: TMU platform data for sh7785 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Magnus Damm This patch adds TMU platform data for sh7785. Both clockevent and clocksource support is enabled. Signed-off-by: Magnus Damm --- Tested on sh7785lcr and r7785 highlander. For correct run-time behaviour this patch is needed: "clocksource: setup mult_orig in clocksource_enable()" arch/sh/Kconfig | 1 arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 204 ++++++++++++++++++++++++++++++++ 2 files changed, 205 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0001/arch/sh/Kconfig +++ work/arch/sh/Kconfig 2009-05-07 16:35:25.000000000 +0900 @@ -389,6 +389,7 @@ config CPU_SUBTYPE_SH7785 select CPU_SHX2 select ARCH_SPARSEMEM_ENABLE select SYS_SUPPORTS_NUMA + select SYS_SUPPORTS_TMU config CPU_SUBTYPE_SH7786 bool "Support SH7786 processor" --- 0001/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ work/arch/sh/kernel/cpu/sh4a/setup-sh7785.c 2009-05-07 16:35:35.000000000 +0900 @@ -13,8 +13,191 @@ #include #include #include +#include #include +static struct sh_timer_config tmu0_platform_data = { + .name = "TMU0", + .channel_offset = 0x04, + .timer_bit = 0, + .clk = "module_clk", + .clockevent_rating = 200, +}; + +static struct resource tmu0_resources[] = { + [0] = { + .name = "TMU0", + .start = 0xffd80008, + .end = 0xffd80013, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 28, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tmu0_device = { + .name = "sh_tmu", + .id = 0, + .dev = { + .platform_data = &tmu0_platform_data, + }, + .resource = tmu0_resources, + .num_resources = ARRAY_SIZE(tmu0_resources), +}; + +static struct sh_timer_config tmu1_platform_data = { + .name = "TMU1", + .channel_offset = 0x10, + .timer_bit = 1, + .clk = "module_clk", + .clocksource_rating = 200, +}; + +static struct resource tmu1_resources[] = { + [0] = { + .name = "TMU1", + .start = 0xffd80014, + .end = 0xffd8001f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 29, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tmu1_device = { + .name = "sh_tmu", + .id = 1, + .dev = { + .platform_data = &tmu1_platform_data, + }, + .resource = tmu1_resources, + .num_resources = ARRAY_SIZE(tmu1_resources), +}; + +static struct sh_timer_config tmu2_platform_data = { + .name = "TMU2", + .channel_offset = 0x1c, + .timer_bit = 2, + .clk = "module_clk", +}; + +static struct resource tmu2_resources[] = { + [0] = { + .name = "TMU2", + .start = 0xffd80020, + .end = 0xffd8002f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 30, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tmu2_device = { + .name = "sh_tmu", + .id = 2, + .dev = { + .platform_data = &tmu2_platform_data, + }, + .resource = tmu2_resources, + .num_resources = ARRAY_SIZE(tmu2_resources), +}; + +static struct sh_timer_config tmu3_platform_data = { + .name = "TMU3", + .channel_offset = 0x04, + .timer_bit = 0, + .clk = "module_clk", +}; + +static struct resource tmu3_resources[] = { + [0] = { + .name = "TMU3", + .start = 0xffdc0008, + .end = 0xffdc0013, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 96, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tmu3_device = { + .name = "sh_tmu", + .id = 3, + .dev = { + .platform_data = &tmu3_platform_data, + }, + .resource = tmu3_resources, + .num_resources = ARRAY_SIZE(tmu3_resources), +}; + +static struct sh_timer_config tmu4_platform_data = { + .name = "TMU4", + .channel_offset = 0x10, + .timer_bit = 1, + .clk = "module_clk", +}; + +static struct resource tmu4_resources[] = { + [0] = { + .name = "TMU4", + .start = 0xffdc0014, + .end = 0xffdc001f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 97, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tmu4_device = { + .name = "sh_tmu", + .id = 4, + .dev = { + .platform_data = &tmu4_platform_data, + }, + .resource = tmu4_resources, + .num_resources = ARRAY_SIZE(tmu4_resources), +}; + +static struct sh_timer_config tmu5_platform_data = { + .name = "TMU5", + .channel_offset = 0x1c, + .timer_bit = 2, + .clk = "module_clk", +}; + +static struct resource tmu5_resources[] = { + [0] = { + .name = "TMU5", + .start = 0xffdc0020, + .end = 0xffdc002b, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 98, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tmu5_device = { + .name = "sh_tmu", + .id = 5, + .dev = { + .platform_data = &tmu5_platform_data, + }, + .resource = tmu5_resources, + .num_resources = ARRAY_SIZE(tmu5_resources), +}; + static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffea0000, @@ -60,6 +243,12 @@ static struct platform_device sci_device }; static struct platform_device *sh7785_devices[] __initdata = { + &tmu0_device, + &tmu1_device, + &tmu2_device, + &tmu3_device, + &tmu4_device, + &tmu5_device, &sci_device, }; @@ -70,6 +259,21 @@ static int __init sh7785_devices_setup(v } __initcall(sh7785_devices_setup); +static struct platform_device *sh7785_early_devices[] __initdata = { + &tmu0_device, + &tmu1_device, + &tmu2_device, + &tmu3_device, + &tmu4_device, + &tmu5_device, +}; + +void __init plat_early_device_setup(void) +{ + early_platform_add_devices(sh7785_early_devices, + ARRAY_SIZE(sh7785_early_devices)); +} + enum { UNUSED = 0,