Possibly icahe/dcache synchronization problem on sh7785lcr

Commit Message

Paul Mundt Oct. 13, 2009, 2:16 a.m. UTC

None

Patch

diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index a98c7d8..74b44ab 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -115,9 +115,9 @@  static inline void flush_cache_4096(unsigned long start,
 static void sh4_flush_dcache_page(void *arg)
 {
 	struct page *page = arg;
-#ifndef CONFIG_SMP
 	struct address_space *mapping = page_mapping(page);
 
+#ifndef CONFIG_SMP
 	if (mapping && !mapping_mapped(mapping))
 		set_bit(PG_dcache_dirty, &page->flags);
 	else
@@ -131,6 +131,8 @@  static void sh4_flush_dcache_page(void *arg)
 		n = boot_cpu_data.dcache.n_aliases;
 		for (i = 0; i < n; i++, addr += 4096)
 			flush_cache_4096(addr, phys);
+
+		flush_icache_all();
 	}
 
 	wmb();