From patchwork Fri Oct 30 04:24:40 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 56562 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n9U4TS9N030529 for ; Fri, 30 Oct 2009 04:29:39 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752756AbZJ3E3d (ORCPT ); Fri, 30 Oct 2009 00:29:33 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1754003AbZJ3E3d (ORCPT ); Fri, 30 Oct 2009 00:29:33 -0400 Received: from mail-yw0-f202.google.com ([209.85.211.202]:47309 "EHLO mail-yw0-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752756AbZJ3E3c (ORCPT ); Fri, 30 Oct 2009 00:29:32 -0400 Received: by mail-yw0-f202.google.com with SMTP id 40so2376312ywh.33 for ; Thu, 29 Oct 2009 21:29:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; 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+ unsigned long bar; /* MMU */ unsigned long pteh; @@ -63,10 +64,14 @@ struct sh_sleep_data { unsigned long sf_pre; unsigned long sf_post; + /* address of resume code */ + unsigned long resume; + /* register state saved and restored by the assembly code */ unsigned long vbr; unsigned long spc; unsigned long sr; + unsigned long sp; /* structure for keeping register addresses */ struct sh_sleep_regs addr; --- 0009/arch/sh/kernel/asm-offsets.c +++ work/arch/sh/kernel/asm-offsets.c 2009-10-29 17:28:31.000000000 +0900 @@ -38,12 +38,15 @@ int main(void) DEFINE(SH_SLEEP_MODE, offsetof(struct sh_sleep_data, mode)); DEFINE(SH_SLEEP_SF_PRE, offsetof(struct sh_sleep_data, sf_pre)); DEFINE(SH_SLEEP_SF_POST, offsetof(struct sh_sleep_data, sf_post)); + DEFINE(SH_SLEEP_RESUME, offsetof(struct sh_sleep_data, resume)); DEFINE(SH_SLEEP_VBR, offsetof(struct sh_sleep_data, vbr)); DEFINE(SH_SLEEP_SPC, offsetof(struct sh_sleep_data, spc)); DEFINE(SH_SLEEP_SR, offsetof(struct sh_sleep_data, sr)); + DEFINE(SH_SLEEP_SP, offsetof(struct sh_sleep_data, sp)); DEFINE(SH_SLEEP_BASE_ADDR, offsetof(struct sh_sleep_data, addr)); DEFINE(SH_SLEEP_BASE_DATA, offsetof(struct sh_sleep_data, data)); DEFINE(SH_SLEEP_REG_STBCR, offsetof(struct sh_sleep_regs, stbcr)); + DEFINE(SH_SLEEP_REG_BAR, offsetof(struct sh_sleep_regs, bar)); DEFINE(SH_SLEEP_REG_PTEH, offsetof(struct sh_sleep_regs, pteh)); DEFINE(SH_SLEEP_REG_PTEL, offsetof(struct sh_sleep_regs, ptel)); DEFINE(SH_SLEEP_REG_TTB, offsetof(struct sh_sleep_regs, ttb)); --- 0010/arch/sh/kernel/cpu/shmobile/pm.c +++ work/arch/sh/kernel/cpu/shmobile/pm.c 2009-10-29 17:27:27.000000000 +0900 @@ -33,13 +33,10 @@ ATOMIC_NOTIFIER_HEAD(sh_mobile_post_slee #define SUSP_MODE_SLEEP (SUSP_SH_SLEEP) #define SUSP_MODE_SLEEP_SF (SUSP_SH_SLEEP | SUSP_SH_SF) #define SUSP_MODE_STANDBY_SF (SUSP_SH_STANDBY | SUSP_SH_SF) - -/* - * The following modes are not there yet: - * - * R-standby mode is unsupported, but will be added in the future - * U-standby mode is low priority since it needs bootloader hacks - */ +#define SUSP_MODE_RSTANDBY (SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_SF) + /* + * U-standby mode is unsupported since it needs bootloader hacks + */ #ifdef CONFIG_CPU_SUBTYPE_SH7724 #define RAM_BASE 0xfd800000 /* RSMEM */ @@ -90,6 +87,7 @@ void sh_mobile_register_self_refresh(uns /* part 0: data area */ sdp = onchip_mem; sdp->addr.stbcr = 0xa4150020; /* STBCR */ + sdp->addr.bar = 0xa4150040; /* BAR */ sdp->addr.pteh = 0xff000000; /* PTEH */ sdp->addr.ptel = 0xff000004; /* PTEL */ sdp->addr.ttb = 0xff000008; /* TTB */ @@ -124,6 +122,7 @@ void sh_mobile_register_self_refresh(uns vp = onchip_mem + 0x600; /* located at interrupt vector */ n = &sh_mobile_sleep_resume_end - &sh_mobile_sleep_resume_start; memcpy(vp, &sh_mobile_sleep_resume_start, n); + sdp->resume = (unsigned long)vp; sh_mobile_sleep_supported |= flags; } --- 0009/arch/sh/kernel/cpu/shmobile/sleep.S +++ work/arch/sh/kernel/cpu/shmobile/sleep.S 2009-10-29 17:29:14.000000000 +0900 @@ -48,6 +48,9 @@ ENTRY(sh_mobile_sleep_enter_start) stc sr, r0 mov.l r0, @(SH_SLEEP_SR, r5) + /* save sp */ + mov.l r15, @(SH_SLEEP_SP, r5) + /* save stbcr */ bsr save_register mov #SH_SLEEP_REG_STBCR, r0 @@ -125,6 +128,12 @@ test_rstandby: tst #SUSP_SH_RSTANDBY, r0 bt test_ustandby + /* setup BAR register */ + bsr get_register + mov #SH_SLEEP_REG_BAR, r0 + mov.l @(SH_SLEEP_RESUME, r5), r1 + mov.l r1, @r0 + /* set mode to "r-standby mode" */ bra do_sleep mov #0x20, r1 @@ -203,6 +212,9 @@ ENTRY(sh_mobile_sleep_resume_start) mov.l @(SH_SLEEP_SR, r5), r0 ldc r0, ssr + /* restore sp */ + mov.l @(SH_SLEEP_SP, r5), r15 + /* restore sleep mode register */ bsr restore_register mov #SH_SLEEP_REG_STBCR, r0