[01/09] sh: div4 reparent workaround

Commit Message

Magnus Damm May 11, 2010, 7:05 a.m. UTC

None

Patch

--- 0001/arch/sh/kernel/cpu/clock-cpg.c
+++ work/arch/sh/kernel/cpu/clock-cpg.c	2010-05-11 14:38:56.000000000 +0900
@@ -168,7 +168,12 @@  static int sh_clk_div4_set_parent(struct
 	u32 value;
 	int ret;
 
-	if (!strcmp("pll_clk", parent->name))
+	/* we really need a better way to determine parent index, but for
+	 * now assume internal parent comes with CLK_ENABLE_ON_INIT set,
+	 * no CLK_ENABLE_ON_INIT means external clock...
+	 */
+
+	if (parent->flags & CLK_ENABLE_ON_INIT)
 		value = __raw_readl(clk->enable_reg) & ~(1 << 7);
 	else
 		value = __raw_readl(clk->enable_reg) | (1 << 7);