From patchwork Mon Oct 25 06:14:57 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Mundt X-Patchwork-Id: 266202 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o9P6FOVb012861 for ; Mon, 25 Oct 2010 06:15:24 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753172Ab0JYGPV (ORCPT ); Mon, 25 Oct 2010 02:15:21 -0400 Received: from 124x34x33x190.ap124.ftth.ucom.ne.jp ([124.34.33.190]:41033 "EHLO master.linux-sh.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752772Ab0JYGPU (ORCPT ); Mon, 25 Oct 2010 02:15:20 -0400 Received: from localhost (unknown [127.0.0.1]) by master.linux-sh.org (Postfix) with ESMTP id 08E7A6376C; Mon, 25 Oct 2010 06:14:58 +0000 (UTC) X-Virus-Scanned: amavisd-new at linux-sh.org Received: from master.linux-sh.org ([127.0.0.1]) by localhost (master.linux-sh.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9QBJttNT+6yt; Mon, 25 Oct 2010 15:14:57 +0900 (JST) Received: by master.linux-sh.org (Postfix, from userid 500) id 835FF63778; Mon, 25 Oct 2010 15:14:57 +0900 (JST) Date: Mon, 25 Oct 2010 15:14:57 +0900 From: Paul Mundt To: Nobuhiro Iwamatsu Cc: linux-sh@vger.kernel.org Subject: Re: [RFC/PATCH] sh: Add 32bit cou mode to cpu_flags Message-ID: <20101025061456.GA14778@linux-sh.org> References: <1287452609-14530-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> <20101019024715.GF5809@linux-sh.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.13 (2006-08-11) Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Mon, 25 Oct 2010 06:15:24 +0000 (UTC) diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index 0a58cb2..c9e7cbc 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h @@ -89,6 +89,7 @@ struct sh_cpuinfo { struct task_struct *idle; #endif + unsigned int phys_bits; unsigned long flags; } __attribute__ ((aligned(L1_CACHE_BYTES))); diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index 9766106..fac742e 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c @@ -340,6 +340,8 @@ asmlinkage void __cpuinit cpu_init(void) */ current_cpu_data.asid_cache = NO_CONTEXT; + current_cpu_data.phys_bits = __in_29bit_mode() ? 29 : 32; + speculative_execution_init(); expmask_init(); diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 4e27846..0af25e0 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -432,6 +432,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) if (c->flags & CPU_HAS_L2_CACHE) show_cacheinfo(m, "scache", c->scache); + seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits); + seq_printf(m, "bogomips\t: %lu.%02lu\n", c->loops_per_jiffy/(500000/HZ), (c->loops_per_jiffy/(5000/HZ)) % 100);