From patchwork Tue Apr 9 22:50:18 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 2418231 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 54261DF25A for ; Tue, 9 Apr 2013 22:51:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932980Ab3DIWvW (ORCPT ); Tue, 9 Apr 2013 18:51:22 -0400 Received: from mail-lb0-f170.google.com ([209.85.217.170]:44753 "EHLO mail-lb0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1765344Ab3DIWvV (ORCPT ); Tue, 9 Apr 2013 18:51:21 -0400 Received: by mail-lb0-f170.google.com with SMTP id x11so7389158lbi.15 for ; Tue, 09 Apr 2013 15:51:20 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:organization:to:subject:date:user-agent:cc :references:in-reply-to:mime-version:content-type :content-transfer-encoding:message-id:x-gm-message-state; bh=nZq0PGun514wnHQnKbf+n75/3hUBzvSgy8Xpn0U/pas=; b=PIJ/4XRrUj8DZgGbNsIw/RueD/jk5mWrkY3WvBH2xTscn37Yd5DNj0OVwLyk9T7SXa gDQe2dRowT/mkF1iY7l7hwLbVTX68VJoLOWaxIjSlyU9fLtxGSBaXDS2EyhwYTi8Qo0f qaIC4C2F+oe9ob23Ddyys06TiJDIMigAJ/9QX0mwDVGhIGSN/VUtVZShheY59r3NATne WYK7BB5FhDmH44TNMA9ONdUhTaZCmZopFpD4LkdiOpHfhw/toCi4pS/FY4BSv8A5NcRH TBOSJGINKhpOTHbfZEG3vheYW1TJfnC0SFUMBX1XRMns3p0kj/AISFMR0xJUA3ql7c8/ OlZg== X-Received: by 10.152.28.130 with SMTP id b2mr2427736lah.51.1365547879894; Tue, 09 Apr 2013 15:51:19 -0700 (PDT) Received: from wasted.dev.rtsoft.ru (ppp91-79-87-206.pppoe.mtu-net.ru. [91.79.87.206]) by mx.google.com with ESMTPS id fz10sm13097926lbb.12.2013.04.09.15.51.18 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 09 Apr 2013 15:51:19 -0700 (PDT) From: Sergei Shtylyov Organization: Cogent Embedded To: linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, balbi@ti.com Subject: [PATCH 1/4] rcar-phy: add R8A7778 support Date: Wed, 10 Apr 2013 02:50:18 +0400 User-Agent: KMail/1.13.5 (Linux/2.6.32.26-175.fc12.i686.PAE; KDE/4.4.5; i686; ; ) Cc: linux-sh@vger.kernel.org References: <201304100247.22615.sergei.shtylyov@cogentembedded.com> In-Reply-To: <201304100247.22615.sergei.shtylyov@cogentembedded.com> MIME-Version: 1.0 Message-Id: <201304100250.19197.sergei.shtylyov@cogentembedded.com> X-Gm-Message-State: ALoCoQm8T/FD6y2ISAthFUJgTAkz747+eOZ74JxlChYP4Zxk/6HSqZdZXbiPA0j/T/0yrnTWfuep Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org The driver currently only supports R8A7779 SoC. Compared to it, R8A7778 USB-PHY has extra register range containing two high-speed signal quality characteristic control registers which should be set up during USB-PHY startup depending on whether a ferrite bead is in use or not. So, we now handle an optional second memory range in the driver's probe method, add the 'ferrite_bead' field to the driver's platform data, and add an extra (optional) step to the USB-PHY startup routine which sets up the extended registers. Also mark in the driver's Kconfig section that R8A7778 is now supported and generally clarify that section, uppercasing the word "phy", while at it... The patch has been tested on the Marzen and BOCK-W boards. Signed-off-by: Sergei Shtylyov Acked-by: Felipe Balbi --- drivers/usb/phy/Kconfig | 8 ++++---- drivers/usb/phy/rcar-phy.c | 31 +++++++++++++++++++++++++++---- include/linux/usb/rcar-phy.h | 7 +++++-- 3 files changed, 36 insertions(+), 10 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: renesas/drivers/usb/phy/Kconfig =================================================================== --- renesas.orig/drivers/usb/phy/Kconfig +++ renesas/drivers/usb/phy/Kconfig @@ -55,13 +55,13 @@ config MV_U3D_PHY SoC. config USB_RCAR_PHY - tristate "Renesas R-Car USB phy support" + tristate "Renesas R-Car USB PHY support" depends on USB || USB_GADGET select USB_OTG_UTILS help - Say Y here to add support for the Renesas R-Car USB phy driver. - This chip is typically used as USB phy for USB host, gadget. - This driver supports: R8A7779 + Say Y here to add support for the Renesas R-Car USB common PHY driver. + This device is typically used as USB PHY for USB host, gadget. + This driver supports R8A7778 and R8A7779. To compile this driver as a module, choose M here: the module will be called rcar-phy. Index: renesas/drivers/usb/phy/rcar-phy.c =================================================================== --- renesas.orig/drivers/usb/phy/rcar-phy.c +++ renesas/drivers/usb/phy/rcar-phy.c @@ -26,6 +26,10 @@ #define USBOH0 0x1C #define USBCTL0 0x58 +/* High-speed signal quality characteristic control registers (R8A7778 only) */ +#define HSQCTL1 0x24 +#define HSQCTL2 0x28 + /* USBPCTRL1 */ #define PHY_RST (1 << 2) #define PLL_ENB (1 << 1) @@ -40,6 +44,7 @@ struct rcar_usb_phy_priv { spinlock_t lock; void __iomem *reg0; + void __iomem *reg1; int counter; }; @@ -59,6 +64,7 @@ static int rcar_usb_phy_init(struct usb_ struct device *dev = phy->dev; struct rcar_phy_platform_data *pdata = dev->platform_data; void __iomem *reg0 = priv->reg0; + void __iomem *reg1 = priv->reg1; int i; u32 val; unsigned long flags; @@ -76,7 +82,16 @@ static int rcar_usb_phy_init(struct usb_ /* (2) start USB-PHY internal PLL */ iowrite32(PHY_ENB | PLL_ENB, (reg0 + USBPCTRL1)); - /* (3) USB module status check */ + /* (3) set USB-PHY in accord with the conditions of usage */ + if (reg1) { + u32 hsqctl1 = pdata->ferrite_bead ? 0x41 : 0; + u32 hsqctl2 = pdata->ferrite_bead ? 0x0d : 7; + + iowrite32(hsqctl1, reg1 + HSQCTL1); + iowrite32(hsqctl2, reg1 + HSQCTL2); + } + + /* (4) USB module status check */ for (i = 0; i < 1024; i++) { udelay(10); val = ioread32(reg0 + USBST); @@ -89,7 +104,7 @@ static int rcar_usb_phy_init(struct usb_ goto phy_init_end; } - /* (4) USB-PHY reset clear */ + /* (5) USB-PHY reset clear */ iowrite32(PHY_ENB | PLL_ENB | PHY_RST, (reg0 + USBPCTRL1)); /* set platform specific port settings */ @@ -129,9 +144,9 @@ static void rcar_usb_phy_shutdown(struct static int rcar_usb_phy_probe(struct platform_device *pdev) { struct rcar_usb_phy_priv *priv; - struct resource *res0; + struct resource *res0, *res1; struct device *dev = &pdev->dev; - void __iomem *reg0; + void __iomem *reg0, *reg1 = NULL; int ret; if (!pdev->dev.platform_data) { @@ -149,6 +164,13 @@ static int rcar_usb_phy_probe(struct pla if (IS_ERR(reg0)) return PTR_ERR(reg0); + res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (res1) { + reg1 = devm_ioremap_resource(dev, res1); + if (IS_ERR(reg1)) + return PTR_ERR(reg1); + } + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) { dev_err(dev, "priv data allocation error\n"); @@ -156,6 +178,7 @@ static int rcar_usb_phy_probe(struct pla } priv->reg0 = reg0; + priv->reg1 = reg1; priv->counter = 0; priv->phy.dev = dev; priv->phy.label = dev_name(dev); Index: renesas/include/linux/usb/rcar-phy.h =================================================================== --- renesas.orig/include/linux/usb/rcar-phy.h +++ renesas/include/linux/usb/rcar-phy.h @@ -14,13 +14,15 @@ #include /* USBPCTRL0 register bits */ -#define USBPCTRL0_OVC2 BIT(10) /* Switches the OVC input pin for port 2: */ +#define USBPCTRL0_OVC2 BIT(10) /* (R8A7779 only) */ + /* Switches the OVC input pin for port 2: */ /* 1: USB_OVC2, 0: OVC2 */ #define USBPCTRL0_OVC1_VBUS1 BIT(9) /* Switches the OVC input pin for port 1: */ /* 1: USB_OVC1, 0: OVC1/VBUS1 */ #define USBPCTRL0_OVC0 BIT(8) /* Switches the OVC input pin for port 0: */ /* 1: USB_OVC0 pin, 0: OVC0 */ -#define USBPCTRL0_OVC2_ACT BIT(6) /* Host mode: OVC2 polarity: */ +#define USBPCTRL0_OVC2_ACT BIT(6) /* (R8A7779 only) */ + /* Host mode: OVC2 polarity: */ /* 1: active-high, 0: active-low */ /* Function mode: be sure to set to 1 */ #define USBPCTRL0_PENC BIT(4) /* Function mode: output level of PENC1 pin: */ @@ -35,6 +37,7 @@ struct rcar_phy_platform_data { u32 usbpctrl0; /* USBPCTRL0 register value */ + bool ferrite_bead; /* (R8A7778 only) */ }; #endif /* __RCAR_PHY_H */