From patchwork Sat Apr 20 20:24:18 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 2468541 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 8537EDF2A1 for ; Sat, 20 Apr 2013 20:25:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754792Ab3DTUZN (ORCPT ); Sat, 20 Apr 2013 16:25:13 -0400 Received: from mail-la0-f49.google.com ([209.85.215.49]:47079 "EHLO mail-la0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754358Ab3DTUZM (ORCPT ); Sat, 20 Apr 2013 16:25:12 -0400 Received: by mail-la0-f49.google.com with SMTP id ei20so549672lab.22 for ; Sat, 20 Apr 2013 13:25:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:organization:to:subject:date:user-agent:cc :references:in-reply-to:mime-version:content-type :content-transfer-encoding:message-id:x-gm-message-state; bh=W92VwI0hbeBq+NJi4364Jmrk5gGBQ2OBHeoBQOR0uWk=; b=J9SaWZAHVqVjESQ+J56oO4EDroHM7ZNSYFkRt7a2HBL5quWdrYNRoosGxlEs4g8Skn 3HumnPaKTb9QPbeOxIbOjJmto3LtY+uA734u9hwXR2E0oYnHodHA9Py2fMi/qQZohxN8 wtpfejKTGFCwy/GdjRSzsGmIvqkQV3DgAl97710MU0vEMdbBPiu8CAlNSEYV3RpenaMz KgwnWh0niFak5GbhcrXxmaw1xd+FnKEygvjP6mpHyQUOC3p6mbwZiJ4E3D89Bna/3k7Z 4ejC0nMN5J6MHYsO+OwFq4oGXyeWpQnwqfuN7TepkxQxo+PHRsVThhI6zGSFImZyByHV x9dA== X-Received: by 10.112.148.65 with SMTP id tq1mr10336080lbb.104.1366489510071; Sat, 20 Apr 2013 13:25:10 -0700 (PDT) Received: from wasted.dev.rtsoft.ru (ppp91-79-89-87.pppoe.mtu-net.ru. [91.79.89.87]) by mx.google.com with ESMTPS id b2sm7925486lbv.4.2013.04.20.13.25.08 (version=TLSv1 cipher=RC4-SHA bits=128/128); Sat, 20 Apr 2013 13:25:08 -0700 (PDT) From: Sergei Shtylyov Organization: Cogent Embedded To: linus.walleij@linaro.org Subject: [PATCH 2/5] sh-pfc: r8a7778: add VIN pin groups Date: Sun, 21 Apr 2013 00:24:18 +0400 User-Agent: KMail/1.13.5 (Linux/2.6.32.26-175.fc12.i686.PAE; KDE/4.4.5; i686; ; ) Cc: linux-sh@vger.kernel.org, matsu@igel.co.jp, vladimir.barinov@cogentembedded.com References: <201304210013.46110.sergei.shtylyov@cogentembedded.com> In-Reply-To: <201304210013.46110.sergei.shtylyov@cogentembedded.com> MIME-Version: 1.0 Message-Id: <201304210024.19400.sergei.shtylyov@cogentembedded.com> X-Gm-Message-State: ALoCoQncqx+bVRN3vIDaQkCdkQLCqGTHhx7+oD+TmdjT5Bc8i+45qQ4/hixofExu+w30bmKrMtD7 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Vladimir Barinov Add VIN DATA[0:8]/CLK/HSYNC/VSYNC pin groups to R8A7778 PFC driver. Signed-off-by: Vladimir Barinov [Sergei: updated the copyrights.] Signed-off-by: Sergei Shtylyov --- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 74 +++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: renesas/drivers/pinctrl/sh-pfc/pfc-r8a7778.c =================================================================== --- renesas.orig/drivers/pinctrl/sh-pfc/pfc-r8a7778.c +++ renesas/drivers/pinctrl/sh-pfc/pfc-r8a7778.c @@ -3,6 +3,7 @@ * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Kuninori Morimoto + * Copyright (C) 2013 Cogent Embedded, Inc. * * based on * Copyright (C) 2011 Renesas Solutions Corp. @@ -1417,6 +1418,59 @@ SCIF_PFC_DAT(scif5_data_a, TX5_A, RX5_ SCIF_PFC_PIN(scif5_data_b, RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14)); SCIF_PFC_DAT(scif5_data_b, TX5_B, RX5_B); +/* - VIN0 ------------------------------------------------------------------- */ +static const unsigned int vin0_data8_pins[] = { + /* D[0:7] */ + RCAR_GP_PIN(3, 29), RCAR_GP_PIN(3, 30), RCAR_GP_PIN(3, 31), + RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2), + RCAR_GP_PIN(4, 3), RCAR_GP_PIN(4, 4), +}; +static const unsigned int vin0_data8_mux[] = { + VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK, VI0_DATA2_VI0_B2_MARK, + VI0_DATA3_VI0_B3_MARK, VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK, + VI0_DATA6_VI0_G0_MARK, VI0_DATA7_VI0_G1_MARK, +}; +static const unsigned int vin0_clk_pins[] = { + /* CLK */ + RCAR_GP_PIN(3, 24), +}; +static const unsigned int vin0_clk_mux[] = { + VI0_CLK_MARK, +}; +static const unsigned int vin0_sync_pins[] = { + /* HSYNC, VSYNC */ + RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28), +}; +static const unsigned int vin0_sync_mux[] = { + VI0_HSYNC_MARK, VI0_VSYNC_MARK, +}; +/* - VIN1 ------------------------------------------------------------------- */ +static const unsigned int vin1_data8_pins[] = { + /* D[0:7] */ + RCAR_GP_PIN(3, 25), RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27), + RCAR_GP_PIN(3, 28), RCAR_GP_PIN(4, 5), RCAR_GP_PIN(4, 6), + RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8), +}; +static const unsigned int vin1_data8_mux[] = { + VI1_DATA0_MARK, VI1_DATA1_MARK, VI1_DATA2_MARK, + VI1_DATA3_MARK, VI1_DATA4_MARK, VI1_DATA5_MARK, + VI1_DATA6_MARK, VI1_DATA7_MARK, +}; +static const unsigned int vin1_clk_pins[] = { + /* CLK */ + RCAR_GP_PIN(4, 9), +}; +static const unsigned int vin1_clk_mux[] = { + VI1_CLK_MARK, +}; +static const unsigned int vin1_sync_pins[] = { + /* HSYNC, VSYNC */ + RCAR_GP_PIN(3, 21), RCAR_GP_PIN(3, 22), +}; +static const unsigned int vin1_sync_mux[] = { + VI1_HSYNC_MARK, VI1_VSYNC_MARK, +}; + static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(hscif0_data_a), SH_PFC_PIN_GROUP(hscif0_data_b), @@ -1461,6 +1515,12 @@ static const struct sh_pfc_pin_group pin SH_PFC_PIN_GROUP(scif4_data_c), SH_PFC_PIN_GROUP(scif5_data_a), SH_PFC_PIN_GROUP(scif5_data_b), + SH_PFC_PIN_GROUP(vin0_data8), + SH_PFC_PIN_GROUP(vin0_clk), + SH_PFC_PIN_GROUP(vin0_sync), + SH_PFC_PIN_GROUP(vin1_data8), + SH_PFC_PIN_GROUP(vin1_clk), + SH_PFC_PIN_GROUP(vin1_sync), }; static const char * const hscif0_groups[] = { @@ -1533,6 +1593,18 @@ static const char * const scif5_groups[] "scif5_data_b", }; +static const char * const vin0_groups[] = { + "vin0_data8", + "vin0_clk", + "vin0_sync", +}; + +static const char * const vin1_groups[] = { + "vin1_data8", + "vin1_clk", + "vin1_sync", +}; + static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), @@ -1543,6 +1615,8 @@ static const struct sh_pfc_function pinm SH_PFC_FUNCTION(scif3), SH_PFC_FUNCTION(scif4), SH_PFC_FUNCTION(scif5), + SH_PFC_FUNCTION(vin0), + SH_PFC_FUNCTION(vin1), }; static struct pinmux_cfg_reg pinmux_config_regs[] = {