From patchwork Tue Apr 23 19:34:57 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 2479951 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 8EFDDDF2E5 for ; Tue, 23 Apr 2013 19:35:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751705Ab3DWTfn (ORCPT ); Tue, 23 Apr 2013 15:35:43 -0400 Received: from mail-lb0-f169.google.com ([209.85.217.169]:64628 "EHLO mail-lb0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751695Ab3DWTfm (ORCPT ); Tue, 23 Apr 2013 15:35:42 -0400 Received: by mail-lb0-f169.google.com with SMTP id p11so1010542lbi.28 for ; Tue, 23 Apr 2013 12:35:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:organization:to:subject:date:user-agent:cc :references:in-reply-to:mime-version:content-type :content-transfer-encoding:message-id:x-gm-message-state; bh=3b5QQEXq+dk1pFQtRF3UtKbSWlZIHagKXEi63VCw9xY=; b=oAcKQNjBDfBusjt2OsOSZ0a4oFig1SpySjDUMwE+KwnER3XmCuBjwI1gKtTM85bwMG DPpGg5PtWomAR7ZnrToMrCFGmJctG2a4O3QmVUQqgYpKhcWi8UGyRYEElaI4SKgFiJsK qMkEakuT10qH7TXpiM7+kfYQs3Ehvfrn4VP+05hzlods6wzl48OJo4fRcakVfOMg1UED 9Rjqa1ecSn1j/OQwvIVP5nunk6c/hHhnaHVF4FEZz/LBiVpmTTbSZt4lNOzjhf9SM37a FsrlAhhuR0OpCSlCYd2ukC0A80h/o1KOP78PBiICuKn25mbEACHpFO64k1cFnPH2hwOV /TtQ== X-Received: by 10.112.173.225 with SMTP id bn1mr16309140lbc.92.1366745740797; Tue, 23 Apr 2013 12:35:40 -0700 (PDT) Received: from wasted.dev.rtsoft.ru (ppp91-79-92-135.pppoe.mtu-net.ru. [91.79.92.135]) by mx.google.com with ESMTPSA id sl5sm90549lbb.10.2013.04.23.12.35.39 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 23 Apr 2013 12:35:39 -0700 (PDT) From: Sergei Shtylyov Organization: Cogent Embedded To: horms@verge.net.au, linux-sh@vger.kernel.org, linus.walleij@linaro.org Subject: [PATCH 1/2] sh-pfc: r8a7778: add Ether pin groups Date: Tue, 23 Apr 2013 23:34:57 +0400 User-Agent: KMail/1.13.5 (Linux/2.6.32.26-175.fc12.i686.PAE; KDE/4.4.5; i686; ; ) Cc: magnus.damm@gmail.com References: <201304232332.56542.sergei.shtylyov@cogentembedded.com> In-Reply-To: <201304232332.56542.sergei.shtylyov@cogentembedded.com> MIME-Version: 1.0 Message-Id: <201304232334.58125.sergei.shtylyov@cogentembedded.com> X-Gm-Message-State: ALoCoQmNnAV/uo257Xzsgy+C0Wf3Xir+EdpcC4rIv5DKLyzfkcG/4tcRoV1pURznC5T/+BeSEYIe Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org Add Ether RMII/LINK/MAGIC pin groups to R8A7778 PFC driver. Signed-off-by: Sergei Shtylyov --- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 42 +++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: renesas/drivers/pinctrl/sh-pfc/pfc-r8a7778.c =================================================================== --- renesas.orig/drivers/pinctrl/sh-pfc/pfc-r8a7778.c +++ renesas/drivers/pinctrl/sh-pfc/pfc-r8a7778.c @@ -1558,6 +1558,38 @@ static const unsigned int vin1_sync_pins static const unsigned int vin1_sync_mux[] = { VI1_HSYNC_MARK, VI1_VSYNC_MARK, }; +/* - Ether ------------------------------------------------------------------ */ +static const unsigned int ether_rmii_pins[] = { + /* + * ETH_TXD0, ETH_TXD1, ETH_TX_EN, ETH_REF_CLK, + * ETH_RXD0, ETH_RXD1, ETH_CRS_DV, ETH_RX_ER, + * ETH_MDIO, ETH_MDC + */ + RCAR_GP_PIN(4, 10), RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 13), + RCAR_GP_PIN(4, 9), + RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 12), + RCAR_GP_PIN(4, 14), + RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17), +}; +static const unsigned int ether_rmii_mux[] = { + ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REF_CLK_MARK, + ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_CRS_DV_MARK, ETH_RX_ER_MARK, + ETH_MDIO_MARK, ETH_MDC_MARK, +}; +static const unsigned int ether_link_pins[] = { + /* ETH_LINK */ + RCAR_GP_PIN(4, 19), +}; +static const unsigned int ether_link_mux[] = { + ETH_LINK_MARK, +}; +static const unsigned int ether_magic_pins[] = { + /* ETH_MAGIC */ + RCAR_GP_PIN(4, 20), +}; +static const unsigned int ether_magic_mux[] = { + ETH_MAGIC_MARK, +}; static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(hscif0_data_a), @@ -1634,6 +1666,9 @@ static const struct sh_pfc_pin_group pin SH_PFC_PIN_GROUP(vin1_data8), SH_PFC_PIN_GROUP(vin1_clk), SH_PFC_PIN_GROUP(vin1_sync), + SH_PFC_PIN_GROUP(ether_rmii), + SH_PFC_PIN_GROUP(ether_link), + SH_PFC_PIN_GROUP(ether_magic), }; static const char * const hscif0_groups[] = { @@ -1753,6 +1788,12 @@ static const char * const vin1_groups[] "vin1_sync", }; +static const char * const ether_groups[] = { + "ether_rmii", + "ether_link", + "ether_magic", +}; + static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), @@ -1768,6 +1809,7 @@ static const struct sh_pfc_function pinm SH_PFC_FUNCTION(sdhi2), SH_PFC_FUNCTION(vin0), SH_PFC_FUNCTION(vin1), + SH_PFC_FUNCTION(ether), }; static struct pinmux_cfg_reg pinmux_config_regs[] = {