From patchwork Wed May 8 23:15:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 2542141 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 70F483FE1F for ; Wed, 8 May 2013 23:15:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753355Ab3EHXPv (ORCPT ); Wed, 8 May 2013 19:15:51 -0400 Received: from mail-la0-f43.google.com ([209.85.215.43]:53010 "EHLO mail-la0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753218Ab3EHXPu (ORCPT ); Wed, 8 May 2013 19:15:50 -0400 Received: by mail-la0-f43.google.com with SMTP id ea20so2290190lab.30 for ; Wed, 08 May 2013 16:15:48 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:organization:to:subject:date:user-agent:cc :references:in-reply-to:mime-version:content-type :content-transfer-encoding:message-id:x-gm-message-state; bh=wBc6xfdVJ5KA/NMXoXQEJCyjPaYgldNCHXphyl4zbJo=; b=NssFMRqBwPEC+Yi6/8ub4mBzgNWJDxXJIbJ2OveKXouv4fFJo5KspRUAfRhN/+IUae tcnQnaA/9Yscsi7CwOONYXHjS1Rfd4xnsuL9xOFximux/GJqm1C34/nS9pxpEqMdqLNz EQUhSc1wz4buc8DJ1rHobwF+QYJvVi8HVN1CLq6rgYYLlOpiO6MMeKeB16xS8DUqAeiy IEcr9bWMuAoR40P2C+Gmk6Ti25R3rYefSnr5qS/wOU8MFtAUdyB1UEh/tYdJhbIKjspN 8GgEi+bxGmyZk65yQuEvD3D31cAIp/R/5Jmae/LBFzTqVt7mwJVluXoQZOHKrXScjn/u B9bA== X-Received: by 10.152.88.40 with SMTP id bd8mr4239302lab.9.1368054948653; Wed, 08 May 2013 16:15:48 -0700 (PDT) Received: from wasted.dev.rtsoft.ru (ppp91-76-93-8.pppoe.mtu-net.ru. [91.76.93.8]) by mx.google.com with ESMTPSA id a7sm383976lbe.1.2013.05.08.16.15.47 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 08 May 2013 16:15:47 -0700 (PDT) From: Sergei Shtylyov Organization: Cogent Embedded To: horms@verge.net.au, linux-sh@vger.kernel.org, linus.walleij@linaro.org Subject: [PATCH v4 3/4] sh-pfc: r8a7778: add Ether pin groups Date: Thu, 9 May 2013 03:15:50 +0400 User-Agent: KMail/1.13.5 (Linux/2.6.32.26-175.fc12.i686.PAE; KDE/4.4.5; i686; ; ) Cc: laurent.pinchart@ideasonboard.com References: <201305090309.41113.sergei.shtylyov@cogentembedded.com> In-Reply-To: <201305090309.41113.sergei.shtylyov@cogentembedded.com> MIME-Version: 1.0 Message-Id: <201305090315.50774.sergei.shtylyov@cogentembedded.com> X-Gm-Message-State: ALoCoQlBivxy+hCC0hQRgSe/hhd2oq8/rAgmBYJR0+mdgDkf9yxY9h6e6JGPW9coJHLiGUJ4YmxQ Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org Add Ether RMII/LINK/MAGIC pin groups to R8A7778 PFC driver. Signed-off-by: Sergei Shtylyov Acked-by: Laurent Pinchart Acked-by: Linus Walleij --- Changes from version 3: - refreshed the patch. Changes from version 2: - fixed whitespace errors/warnings reported by scripts/checkpatch.pl. Changes from the original posting: - resolved reject, refreshed the patch; - moved all pin groups to stay in the alphabetical order with the others; - made use of SH_PFC_*() macros where possible. drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: renesas/drivers/pinctrl/sh-pfc/pfc-r8a7778.c =================================================================== --- renesas.orig/drivers/pinctrl/sh-pfc/pfc-r8a7778.c +++ renesas/drivers/pinctrl/sh-pfc/pfc-r8a7778.c @@ -1323,6 +1323,22 @@ static struct sh_pfc_pin pinmux_pins[] = arg5##_MARK, arg6##_MARK, \ arg7##_MARK, arg8##_MARK, } +/* - Ether ------------------------------------------------------------------ */ +SH_PFC_PINS(ether_rmii, RCAR_GP_PIN(4, 10), RCAR_GP_PIN(4, 11), + RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 9), + RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), + RCAR_GP_PIN(4, 12), RCAR_GP_PIN(4, 14), + RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17)); +static const unsigned int ether_rmii_mux[] = { + ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REF_CLK_MARK, + ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_CRS_DV_MARK, ETH_RX_ER_MARK, + ETH_MDIO_MARK, ETH_MDC_MARK, +}; +SH_PFC_PINS(ether_link, RCAR_GP_PIN(4, 19)); +SH_PFC_MUX1(ether_link, ETH_LINK); +SH_PFC_PINS(ether_magic, RCAR_GP_PIN(4, 20)); +SH_PFC_MUX1(ether_magic, ETH_MAGIC); + /* - SCIF macro ------------------------------------------------------------- */ #define SCIF_PFC_PIN(name, args...) SH_PFC_PINS(name, args) #define SCIF_PFC_DAT(name, tx, rx) SH_PFC_MUX2(name, tx, rx) @@ -1554,6 +1570,9 @@ VIN_PFC_PINS(vin1_sync, RCAR_GP_PIN(3, VIN_PFC_SYNC(vin1_sync, VI1_HSYNC, VI1_VSYNC); static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(ether_rmii), + SH_PFC_PIN_GROUP(ether_link), + SH_PFC_PIN_GROUP(ether_magic), SH_PFC_PIN_GROUP(hscif0_data_a), SH_PFC_PIN_GROUP(hscif0_data_b), SH_PFC_PIN_GROUP(hscif0_ctrl_a), @@ -1634,6 +1653,12 @@ static const struct sh_pfc_pin_group pin SH_PFC_PIN_GROUP(vin1_sync), }; +static const char * const ether_groups[] = { + "ether_rmii", + "ether_link", + "ether_magic", +}; + static const char * const hscif0_groups[] = { "hscif0_data_a", "hscif0_data_b", @@ -1762,6 +1787,7 @@ static const char * const vin1_groups[] }; static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(ether), SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), SH_PFC_FUNCTION(scif_clk),