From patchwork Thu Aug 8 21:42:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 2841431 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1885EBF546 for ; Thu, 8 Aug 2013 21:42:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C243B203AE for ; Thu, 8 Aug 2013 21:42:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0EEE6201BE for ; Thu, 8 Aug 2013 21:42:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752649Ab3HHVmE (ORCPT ); Thu, 8 Aug 2013 17:42:04 -0400 Received: from mail-la0-f51.google.com ([209.85.215.51]:36059 "EHLO mail-la0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751970Ab3HHVmD (ORCPT ); Thu, 8 Aug 2013 17:42:03 -0400 Received: by mail-la0-f51.google.com with SMTP id fp13so2537488lab.10 for ; Thu, 08 Aug 2013 14:42:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:from:organization:to:subject:date:user-agent:cc :references:in-reply-to:mime-version:content-type :content-transfer-encoding:message-id; bh=uzt6dDhihidqe0VtnSZTT33cSC2Q3XMMGySy9asF8CE=; b=jdJbcEB4UaPqIUZBdBDHG5Plw2p0XblKHEvzdtakrs2Fge/tG86TibE/GS1XmpztFw ++YPvmlL8J/08gyQQ1WYTNwOQgT+H17agS5EzqETfWqJg4lE3WJ8nuJMAoxoxbyo3xLf xXFJi4mJAicRXF50JEMXTTeT99eJ9Yr1Iu8JPss+xXfnq3mhq6Xo1TwlA4IgT9Sn1I28 NMCIydgsN3BeTpqyXCHyzdhs/90tpExD8HlbuvxUFHUMjJ6MUDGnBRe6r+yUDc/IY/TW luefFlG+kI5BVizgatdwgCqizZSDtJHfMn7ywlC/HE5j8kojY0MwyKzVz7ZW/Lag2ady 7bcg== X-Gm-Message-State: ALoCoQnDWFGhWbZwePiUVxiaiHp09WO28uxxZTfDYYBY78RG4h33tnDfhWy1h2VG4YrdSxcNZLBo X-Received: by 10.152.115.176 with SMTP id jp16mr2189086lab.17.1375998121560; Thu, 08 Aug 2013 14:42:01 -0700 (PDT) Received: from wasted.dev.rtsoft.ru (ppp91-76-150-139.pppoe.mtu-net.ru. [91.76.150.139]) by mx.google.com with ESMTPSA id b6sm1514243lae.0.2013.08.08.14.41.59 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 08 Aug 2013 14:42:00 -0700 (PDT) From: Sergei Shtylyov Organization: Cogent Embedded To: horms@verge.net.au, linux-sh@vger.kernel.org Subject: [PATCH 1/2] ARM: shmobile: r8a7779: add HPB-DMAC support Date: Fri, 9 Aug 2013 01:42:07 +0400 User-Agent: KMail/1.13.5 (Linux/2.6.32.26-175.fc12.i686.PAE; KDE/4.4.5; i686; ; ) Cc: magnus.damm@gmail.com, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org, max.filippov@cogentembedded.com References: <201308090140.14515.sergei.shtylyov@cogentembedded.com> In-Reply-To: <201308090140.14515.sergei.shtylyov@cogentembedded.com> MIME-Version: 1.0 Message-Id: <201308090142.08148.sergei.shtylyov@cogentembedded.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Max Filippov Add HPB-DMAC platform device on R8A7779 SoC along with its slave and channel configurations. Signed-off-by: Max Filippov [Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed to , removed #include from setup-r8a7779.c, removed SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and hpb_dmae_channels[], added ASYNCMDR.ASBTMD20 and ASYNCMDR.ASMD20 fields/values, fixed comments to ASYNCMDR.ASBTMD2[123] and ASYNCMDR.ASMD2[123] fields/values, moved comments after the element initializers of hpb_dmae_channels[].] Signed-off-by: Sergei Shtylyov --- arch/arm/mach-shmobile/include/mach/r8a7779.h | 7 + arch/arm/mach-shmobile/setup-r8a7779.c | 132 ++++++++++++++++++++++++++ 2 files changed, 139 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: renesas/arch/arm/mach-shmobile/include/mach/r8a7779.h =================================================================== --- renesas.orig/arch/arm/mach-shmobile/include/mach/r8a7779.h +++ renesas/arch/arm/mach-shmobile/include/mach/r8a7779.h @@ -5,6 +5,13 @@ #include #include +/* HPB-DMA slave IDs */ +enum { + HPBDMA_SLAVE_DUMMY, + HPBDMA_SLAVE_SDHI0_TX, + HPBDMA_SLAVE_SDHI0_RX, +}; + struct platform_device; struct r8a7779_pm_ch { Index: renesas/arch/arm/mach-shmobile/setup-r8a7779.c =================================================================== --- renesas.orig/arch/arm/mach-shmobile/setup-r8a7779.c +++ renesas/arch/arm/mach-shmobile/setup-r8a7779.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -605,6 +606,136 @@ static struct resource ether_resources[] }, }; +/* HPB-DMA */ + +/* Asynchronous mode register bits */ +#define ASYNCMDR_ASMD41_MASK BIT(19) /* SDHI3 */ +#define ASYNCMDR_ASMD41_SINGLE BIT(19) /* SDHI3 */ +#define ASYNCMDR_ASMD41_MULTI 0 /* SDHI3 */ +#define ASYNCMDR_ASBTMD41_MASK BIT(18) /* SDHI3 */ +#define ASYNCMDR_ASBTMD41_BURST BIT(18) /* SDHI3 */ +#define ASYNCMDR_ASBTMD41_NBURST 0 /* SDHI3 */ +#define ASYNCMDR_ASMD40_MASK BIT(17) /* SDHI3 */ +#define ASYNCMDR_ASMD40_SINGLE BIT(17) /* SDHI3 */ +#define ASYNCMDR_ASMD40_MULTI 0 /* SDHI3 */ +#define ASYNCMDR_ASBTMD40_MASK BIT(16) /* SDHI3 */ +#define ASYNCMDR_ASBTMD40_BURST BIT(16) /* SDHI3 */ +#define ASYNCMDR_ASBTMD40_NBURST 0 /* SDHI3 */ +#define ASYNCMDR_ASMD39_MASK BIT(15) /* SDHI3 */ +#define ASYNCMDR_ASMD39_SINGLE BIT(15) /* SDHI3 */ +#define ASYNCMDR_ASMD39_MULTI 0 /* SDHI3 */ +#define ASYNCMDR_ASBTMD39_MASK BIT(14) /* SDHI3 */ +#define ASYNCMDR_ASBTMD39_BURST BIT(14) /* SDHI3 */ +#define ASYNCMDR_ASBTMD39_NBURST 0 /* SDHI3 */ +#define ASYNCMDR_ASMD27_MASK BIT(13) /* SDHI2 */ +#define ASYNCMDR_ASMD27_SINGLE BIT(13) /* SDHI2 */ +#define ASYNCMDR_ASMD27_MULTI 0 /* SDHI2 */ +#define ASYNCMDR_ASBTMD27_MASK BIT(12) /* SDHI2 */ +#define ASYNCMDR_ASBTMD27_BURST BIT(12) /* SDHI2 */ +#define ASYNCMDR_ASBTMD27_NBURST 0 /* SDHI2 */ +#define ASYNCMDR_ASMD26_MASK BIT(11) /* SDHI2 */ +#define ASYNCMDR_ASMD26_SINGLE BIT(11) /* SDHI2 */ +#define ASYNCMDR_ASMD26_MULTI 0 /* SDHI2 */ +#define ASYNCMDR_ASBTMD26_MASK BIT(10) /* SDHI2 */ +#define ASYNCMDR_ASBTMD26_BURST BIT(10) /* SDHI2 */ +#define ASYNCMDR_ASBTMD26_NBURST 0 /* SDHI2 */ +#define ASYNCMDR_ASMD25_MASK BIT(9) /* SDHI2 */ +#define ASYNCMDR_ASMD25_SINGLE BIT(9) /* SDHI2 */ +#define ASYNCMDR_ASMD25_MULTI 0 /* SDHI2 */ +#define ASYNCMDR_ASBTMD25_MASK BIT(8) /* SDHI2 */ +#define ASYNCMDR_ASBTMD25_BURST BIT(8) /* SDHI2 */ +#define ASYNCMDR_ASBTMD25_NBURST 0 /* SDHI2 */ +#define ASYNCMDR_ASMD23_MASK BIT(7) /* SDHI0 */ +#define ASYNCMDR_ASMD23_SINGLE BIT(7) /* SDHI0 */ +#define ASYNCMDR_ASMD23_MULTI 0 /* SDHI0 */ +#define ASYNCMDR_ASBTMD23_MASK BIT(6) /* SDHI0 */ +#define ASYNCMDR_ASBTMD23_BURST BIT(6) /* SDHI0 */ +#define ASYNCMDR_ASBTMD23_NBURST 0 /* SDHI0 */ +#define ASYNCMDR_ASMD22_MASK BIT(5) /* SDHI0 */ +#define ASYNCMDR_ASMD22_SINGLE BIT(5) /* SDHI0 */ +#define ASYNCMDR_ASMD22_MULTI 0 /* SDHI0 */ +#define ASYNCMDR_ASBTMD22_MASK BIT(4) /* SDHI0 */ +#define ASYNCMDR_ASBTMD22_BURST BIT(4) /* SDHI0 */ +#define ASYNCMDR_ASBTMD22_NBURST 0 /* SDHI0 */ +#define ASYNCMDR_ASMD21_MASK BIT(3) /* SDHI0 */ +#define ASYNCMDR_ASMD21_SINGLE BIT(3) /* SDHI0 */ +#define ASYNCMDR_ASMD21_MULTI 0 /* SDHI0 */ +#define ASYNCMDR_ASBTMD21_MASK BIT(2) /* SDHI0 */ +#define ASYNCMDR_ASBTMD21_BURST BIT(2) /* SDHI0 */ +#define ASYNCMDR_ASBTMD21_NBURST 0 /* SDHI0 */ +#define ASYNCMDR_ASMD20_MASK BIT(1) /* SDHI1 */ +#define ASYNCMDR_ASMD20_SINGLE BIT(1) /* SDHI1 */ +#define ASYNCMDR_ASMD20_MULTI 0 /* SDHI1 */ +#define ASYNCMDR_ASBTMD20_MASK BIT(0) /* SDHI1 */ +#define ASYNCMDR_ASBTMD20_BURST BIT(0) /* SDHI1 */ +#define ASYNCMDR_ASBTMD20_NBURST 0 /* SDHI1 */ + +static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = { + { + .id = HPBDMA_SLAVE_SDHI0_TX, + .addr = 0xffe4c000 + 0x30, + .dcr = DCR_SPDS_16BIT | DCR_DMDL | DCR_DPDS_16BIT, + .rstr = ASYNCRSTR_ASRST21 | ASYNCRSTR_ASRST22 | + ASYNCRSTR_ASRST23, + .mdr = ASYNCMDR_ASMD21_SINGLE | ASYNCMDR_ASBTMD21_NBURST, + .mdm = ASYNCMDR_ASMD21_MASK | ASYNCMDR_ASBTMD21_MASK, + .port = 0x0D0C, + .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE, + .dma_ch = 21, + }, { + .id = HPBDMA_SLAVE_SDHI0_RX, + .addr = 0xffe4c000 + 0x30, + .dcr = DCR_SMDL | DCR_SPDS_16BIT | DCR_DPDS_16BIT, + .rstr = ASYNCRSTR_ASRST21 | ASYNCRSTR_ASRST22 | + ASYNCRSTR_ASRST23, + .mdr = ASYNCMDR_ASMD22_SINGLE | ASYNCMDR_ASBTMD22_NBURST, + .mdm = ASYNCMDR_ASMD22_MASK | ASYNCMDR_ASBTMD22_MASK, + .port = 0x0D0C, + .flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE, + .dma_ch = 22, + }, +}; + +static const struct hpb_dmae_channel hpb_dmae_channels[] = { + HPB_DMAE_CHANNEL(0x93, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */ + HPB_DMAE_CHANNEL(0x93, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */ +}; + +static struct hpb_dmae_pdata dma_platform_data __initdata = { + .slaves = hpb_dmae_slaves, + .num_slaves = ARRAY_SIZE(hpb_dmae_slaves), + .channels = hpb_dmae_channels, + .num_channels = ARRAY_SIZE(hpb_dmae_channels), + .ts_shift = { + [XMIT_SZ_8BIT] = 0, + [XMIT_SZ_16BIT] = 1, + [XMIT_SZ_32BIT] = 2, + }, + .num_hw_channels = 44, +}; + +static struct resource hpb_dmae_resources[] __initdata = { + /* Channel registers */ + DEFINE_RES_MEM(0xffc08000, 0x1000), + /* Common registers */ + DEFINE_RES_MEM(0xffc09000, 0x170), + /* Asynchronous reset registers */ + DEFINE_RES_MEM(0xffc00300, 4), + /* Asynchronous mode registers */ + DEFINE_RES_MEM(0xffc00400, 4), + /* IRQ for DMA channels */ + DEFINE_RES_NAMED(gic_iid(0x8e), 12, NULL, IORESOURCE_IRQ), +}; + +static void __init r8a7779_register_hpb_dmae(void) +{ + platform_device_register_resndata(&platform_bus, "hpb-dma-engine", -1, + hpb_dmae_resources, + ARRAY_SIZE(hpb_dmae_resources), + &dma_platform_data, + sizeof(dma_platform_data)); +} + static struct platform_device *r8a7779_devices_dt[] __initdata = { &scif0_device, &scif1_device, @@ -638,6 +769,7 @@ void __init r8a7779_add_standard_devices ARRAY_SIZE(r8a7779_devices_dt)); platform_add_devices(r8a7779_standard_devices, ARRAY_SIZE(r8a7779_standard_devices)); + r8a7779_register_hpb_dmae(); } void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)