From patchwork Wed Dec 17 12:53:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 5506881 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D5C839F30B for ; Wed, 17 Dec 2014 12:50:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D778020A16 for ; Wed, 17 Dec 2014 12:50:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DAC33209E5 for ; Wed, 17 Dec 2014 12:50:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751890AbaLQMuc (ORCPT ); Wed, 17 Dec 2014 07:50:32 -0500 Received: from mail-pa0-f41.google.com ([209.85.220.41]:42254 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750829AbaLQMuc (ORCPT ); Wed, 17 Dec 2014 07:50:32 -0500 Received: by mail-pa0-f41.google.com with SMTP id rd3so16375071pab.28 for ; Wed, 17 Dec 2014 04:50:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=Z13qUrRUlbMRyFk1wQdX9OJXeXxQJKBmXCT7f0Z5ZgU=; b=Asb+8NvpOmOTD7jL8K1IoZtRHlCuQSPkNnBDOMVm7IN6Wiubc4hSYtt4EXl965bus1 vpxn6CaoBNMRBjw4zXG3Dc7sLaDXzHJ29N9sNYrL2vnhvezynMvOgEcCsn8olEvLmzMf m5NgfyXwlh7jyAZleGKjG4MmGE11OapbT7Pmqv/UihkgsDT1WXY8KBA5RkOrESfeR7z0 siKGFSX1dn/yGRSWCYvsVCYHjONvy+06ud5wPWS9YCFYHXpfWtq6w/AS/faIG66uN/k1 8vGwUcsDb3lOdaPFjiCq3sOMbY5suIgiCVk+P1cM9Hd3kN95rb8ZuiL34JKRFqjbBCtH ZyRw== X-Received: by 10.70.109.203 with SMTP id hu11mr67702727pdb.36.1418820631506; Wed, 17 Dec 2014 04:50:31 -0800 (PST) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by mx.google.com with ESMTPSA id bj11sm3961305pdb.1.2014.12.17.04.50.28 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 17 Dec 2014 04:50:30 -0800 (PST) From: Magnus Damm To: linux-sh@vger.kernel.org Cc: gregkh@linuxfoundation.org, Magnus Damm , jslaby@suse.cz, linux-serial@vger.kernel.org Date: Wed, 17 Dec 2014 21:53:15 +0900 Message-Id: <20141217125315.14480.15475.sendpatchset@w520> In-Reply-To: <20141217125236.14480.78833.sendpatchset@w520> References: <20141217125236.14480.78833.sendpatchset@w520> Subject: [PATCH 04/05] serial: sh-sci: Add SCIFA/SCIFB CTS/RTS pin setup Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Add SCIFA/SCIFB pin setup code for CTS/RTS pins to handle both cases of hardware flow control enabled or disabled. Signed-off-by: Magnus Damm --- drivers/tty/serial/sh-sci.c | 60 ++++++++++++++++++++++++++++++++++++++++++- include/linux/serial_sci.h | 2 + 2 files changed, 61 insertions(+), 1 deletion(-) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0006/drivers/tty/serial/sh-sci.c +++ work/drivers/tty/serial/sh-sci.c 2014-12-16 16:10:18.000000000 +0900 @@ -168,6 +168,8 @@ static struct plat_sci_reg sci_regmap[SC [SCSPTR] = sci_reg_invalid, [SCLSR] = sci_reg_invalid, [HSSRR] = sci_reg_invalid, + [SCPCR] = sci_reg_invalid, + [SCPDR] = sci_reg_invalid, }, /* @@ -188,6 +190,8 @@ static struct plat_sci_reg sci_regmap[SC [SCSPTR] = sci_reg_invalid, [SCLSR] = sci_reg_invalid, [HSSRR] = sci_reg_invalid, + [SCPCR] = sci_reg_invalid, + [SCPDR] = sci_reg_invalid, }, /* @@ -207,6 +211,8 @@ static struct plat_sci_reg sci_regmap[SC [SCSPTR] = sci_reg_invalid, [SCLSR] = sci_reg_invalid, [HSSRR] = sci_reg_invalid, + [SCPCR] = { 0x30, 16 }, + [SCPDR] = { 0x34, 16 }, }, /* @@ -226,6 +232,8 @@ static struct plat_sci_reg sci_regmap[SC [SCSPTR] = sci_reg_invalid, [SCLSR] = sci_reg_invalid, [HSSRR] = sci_reg_invalid, + [SCPCR] = { 0x30, 16 }, + [SCPDR] = { 0x34, 16 }, }, /* @@ -246,6 +254,8 @@ static struct plat_sci_reg sci_regmap[SC [SCSPTR] = { 0x20, 16 }, [SCLSR] = { 0x24, 16 }, [HSSRR] = sci_reg_invalid, + [SCPCR] = sci_reg_invalid, + [SCPDR] = sci_reg_invalid, }, /* @@ -265,6 +275,8 @@ static struct plat_sci_reg sci_regmap[SC [SCSPTR] = sci_reg_invalid, [SCLSR] = sci_reg_invalid, [HSSRR] = sci_reg_invalid, + [SCPCR] = sci_reg_invalid, + [SCPDR] = sci_reg_invalid, }, /* @@ -284,6 +296,8 @@ static struct plat_sci_reg sci_regmap[SC [SCSPTR] = { 0x20, 16 }, [SCLSR] = { 0x24, 16 }, [HSSRR] = sci_reg_invalid, + [SCPCR] = sci_reg_invalid, + [SCPDR] = sci_reg_invalid, }, /* @@ -303,6 +317,8 @@ static struct plat_sci_reg sci_regmap[SC [SCSPTR] = { 0x20, 16 }, [SCLSR] = { 0x24, 16 }, [HSSRR] = { 0x40, 16 }, + [SCPCR] = sci_reg_invalid, + [SCPDR] = sci_reg_invalid, }, /* @@ -323,6 +339,8 @@ static struct plat_sci_reg sci_regmap[SC [SCSPTR] = sci_reg_invalid, [SCLSR] = { 0x24, 16 }, [HSSRR] = sci_reg_invalid, + [SCPCR] = sci_reg_invalid, + [SCPDR] = sci_reg_invalid, }, /* @@ -343,6 +361,8 @@ static struct plat_sci_reg sci_regmap[SC [SCSPTR] = { 0x24, 16 }, [SCLSR] = { 0x28, 16 }, [HSSRR] = sci_reg_invalid, + [SCPCR] = sci_reg_invalid, + [SCPDR] = sci_reg_invalid, }, /* @@ -363,6 +383,8 @@ static struct plat_sci_reg sci_regmap[SC [SCSPTR] = sci_reg_invalid, [SCLSR] = sci_reg_invalid, [HSSRR] = sci_reg_invalid, + [SCPCR] = sci_reg_invalid, + [SCPDR] = sci_reg_invalid, }, }; @@ -542,6 +564,34 @@ static void sci_init_pins_default(struct serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */ } +static void sci_init_pins_scifab(struct uart_port *port, bool hwflow_enabled) +{ + unsigned short control, data; + + /* SCIFA/SCIFB CTS/RTS pin configuration depends on user space. + * + * In case of CTS - (SCPDR.CTSD is always accessible): + * - Hardware flow control enabled: "CTS pin function" + * - Hardware flow control disabled: "Input port" + * + * In case of RTS: + * - Hardware flow control enabled: "RTS pin function" + * - Hardware flow control disabled: "Output port" with value 1 + */ + control = serial_port_in(port, SCPCR); + data = serial_port_in(port, SCPDR); + + if (hwflow_enabled) { + control &= ~(BIT(4) | BIT(3)); + } else { + control |= BIT(4) | BIT(3); + data |= BIT(4); + } + + serial_port_out(port, SCPDR, data); + serial_port_out(port, SCPCR, control); +} + static void sci_init_pins(struct uart_port *port, unsigned int cflag) { struct sci_port *s = to_sci_port(port); @@ -568,7 +618,15 @@ static void sci_init_pins(struct uart_po if (!(s->cfg->capabilities & SCIx_HAVE_RTSCTS)) return; - sci_init_pins_default(port, hwflow_enabled); + switch (s->cfg->type) { + case PORT_SCIFA: + case PORT_SCIFB: + sci_init_pins_scifab(port, hwflow_enabled); + break; + default: + sci_init_pins_default(port, hwflow_enabled); + } + } static int sci_txfill(struct uart_port *port) --- 0006/include/linux/serial_sci.h +++ work/include/linux/serial_sci.h 2014-12-16 16:10:18.000000000 +0900 @@ -102,6 +102,8 @@ enum { SCRFDR, /* Receive FIFO Data Count Register */ SCSPTR, /* Serial Port Register */ HSSRR, /* Sampling Rate Register */ + SCPCR, /* Serial Port Control Register */ + SCPDR, /* Serial Port Data Register */ SCIx_NR_REGS, };