From patchwork Thu Jan 29 07:25:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 5738101 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A419F9F536 for ; Thu, 29 Jan 2015 07:19:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AC43020218 for ; Thu, 29 Jan 2015 07:19:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B084C201FE for ; Thu, 29 Jan 2015 07:19:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752200AbbA2HTU (ORCPT ); Thu, 29 Jan 2015 02:19:20 -0500 Received: from mail-pa0-f41.google.com ([209.85.220.41]:62892 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751350AbbA2HTT (ORCPT ); Thu, 29 Jan 2015 02:19:19 -0500 Received: by mail-pa0-f41.google.com with SMTP id kq14so35658862pab.0 for ; Wed, 28 Jan 2015 23:19:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:subject; bh=fPl5y5b/otuxKwZLrOp0wxvuHpL18LyEip3Tv1Y5wEc=; b=f2ld8Y1qWsN7H3VPWTmuB/CHwBwoG9qMFAGEx/u6NU4mUZXxl5ICW+/u9obbCjnzFM IlaoJ4naqEfTIbrP9QOM8M8aouY+OLv/ElpnXFzNgPqbleR1fT/2V1XndXzboW8lu5tV vvbQHDRzO2YUC7+RmnIBT2U7y3ga5di5tUcTUEF/MHc4uIYHQKUso4FQA7jexqkH0px6 uWAXjnkZOwIPPM+sR4TPA7C6q3ej7fh3KIDNVRWjdNcq4AI/tfk2pDL5I3RIdevr8zZI Ke6Qnv7GMI/n4lSaf3ifvq/yppXtIGLILZT49lx6Sd0QHgzzEb/7i1v+vVagc4yKOko2 tyqw== X-Received: by 10.66.123.7 with SMTP id lw7mr12347154pab.103.1422515959116; Wed, 28 Jan 2015 23:19:19 -0800 (PST) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by mx.google.com with ESMTPSA id ej9sm6791972pdb.1.2015.01.28.23.19.15 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Jan 2015 23:19:17 -0800 (PST) From: Magnus Damm To: linux-sh@vger.kernel.org Cc: geert+renesas@glider.be, arnd@arndb.de, marc.zyngier@arm.com, horms@verge.net.au, olof@lixom.net, Magnus Damm Date: Thu, 29 Jan 2015 16:25:32 +0900 Message-Id: <20150129072532.25107.17303.sendpatchset@little-apple> Subject: [PATCH] ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm As of commit 9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq domain."), the Lager legacy board support is known to be broken. The IRQ numbers of the GIC are now virtual, and no longer match the hardcoded hardware IRQ numbers in the legacy platform board code. To fix this issue specific to non-multiplatform r8a7790 and Lager: 1) Instantiate the GIC from platform board code and also 2) Skip over the DT arch timer as well as 3) Force delay setup based on DT CPU frequency With these 3 fixes in place interrupts on Lager are now unbroken. Partially based on legacy GIC fix by Geert Uytterhoeven, thanks to him for the initial work. Signed-off-by: Magnus Damm Acked-by: Geert Uytterhoeven --- Suitable as a fix for v3.19-rc6. Depends on [PATCH v2] ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds arch/arm/mach-shmobile/board-lager.c | 13 +++++++++++++ arch/arm/mach-shmobile/setup-rcar-gen2.c | 2 ++ arch/arm/mach-shmobile/timer.c | 5 +++++ 3 files changed, 20 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0001/arch/arm/mach-shmobile/board-lager.c +++ work/arch/arm/mach-shmobile/board-lager.c 2015-01-29 16:16:32.065025352 +0900 @@ -21,6 +21,8 @@ #include #include #include +#include +#include #include #include #include @@ -811,6 +813,16 @@ static void __init lager_init(void) lager_ksz8041_fixup); } +static void __init lager_legacy_init_irq(void) +{ + void __iomem *gic_dist_base = ioremap_nocache(0xf1001000, 0x1000); + void __iomem *gic_cpu_base = ioremap_nocache(0xf1002000, 0x1000); + + gic_init(0, 29, gic_dist_base, gic_cpu_base); + + /* Do not invoke DT-based interrupt code via irqchip_init() */ +} + static const char * const lager_boards_compat_dt[] __initconst = { "renesas,lager", NULL, @@ -819,6 +831,7 @@ static const char * const lager_boards_c DT_MACHINE_START(LAGER_DT, "lager") .smp = smp_ops(r8a7790_smp_ops), .init_early = shmobile_init_delay, + .init_irq = lager_legacy_init_irq, .init_time = rcar_gen2_timer_init, .init_machine = lager_init, .init_late = shmobile_init_late, --- 0001/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ work/arch/arm/mach-shmobile/setup-rcar-gen2.c 2015-01-29 16:16:32.065025352 +0900 @@ -133,7 +133,9 @@ void __init rcar_gen2_timer_init(void) #ifdef CONFIG_COMMON_CLK rcar_gen2_clocks_init(mode); #endif +#ifdef CONFIG_ARCH_SHMOBILE_MULTI clocksource_of_init(); +#endif } struct memory_reserve_config { --- 0002/arch/arm/mach-shmobile/timer.c +++ work/arch/arm/mach-shmobile/timer.c 2015-01-29 16:17:04.915025234 +0900 @@ -75,6 +75,11 @@ void __init shmobile_init_delay(void) * to GIC being initialized from C and arch timer via DT */ if (of_machine_is_compatible("renesas,r8a73a4")) has_arch_timer = false; + + /* Non-multiplatform r8a7790 SoC cannot use arch timer due + * to GIC being initialized from C and arch timer via DT */ + if (of_machine_is_compatible("renesas,r8a7790")) + has_arch_timer = false; #endif if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {