From patchwork Sun Jun 21 08:09:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 6652051 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C8336C05AC for ; Sun, 21 Jun 2015 08:07:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 290492068A for ; Sun, 21 Jun 2015 08:07:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B9E642069D for ; Sun, 21 Jun 2015 08:07:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753134AbbFUIG4 (ORCPT ); Sun, 21 Jun 2015 04:06:56 -0400 Received: from mail-pa0-f41.google.com ([209.85.220.41]:33291 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932374AbbFUIGk (ORCPT ); Sun, 21 Jun 2015 04:06:40 -0400 Received: by padev16 with SMTP id ev16so113321054pad.0; Sun, 21 Jun 2015 01:06:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=rHOzIRGNX891YXd9aJpF7DBVxHq3CvXjMaV2KrS/I0o=; b=TxID/Q4BpjwamqJ87aERyS0PruCgu5FV+afFOaXnRe3TakHbeulWUm5Vwo3q9i4Q8W Yo+VAgXgy5Q1Jv3s8HBCjnIpTqP+J67/w+OqnwhQ0/XXAeEhs5A5HvYsienOA+l+Rhfv 7iwXFCyr2JWzmJOaUJlbh2gqpm70lZv8OfHemLfXW9PZjZpEYjyZkVaDAnTseZDPKfiP 373yfSYAz4fCmpKlIpiX+lHgA+q11rNf+DD80G64jKvOr/0qHJrc0RcVH7Gsw4Dvfqi3 1/zXMgTeee0StssM294n5nn3C2BtILmVWJt1KMx36Vxq0rwUSrna6jZuH+pP9WcQIUgd e5OA== X-Received: by 10.68.232.164 with SMTP id tp4mr47343140pbc.101.1434873999940; Sun, 21 Jun 2015 01:06:39 -0700 (PDT) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by mx.google.com with ESMTPSA id je2sm16099166pbd.3.2015.06.21.01.06.36 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 21 Jun 2015 01:06:38 -0700 (PDT) From: Magnus Damm To: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org, laurent.pinchart+renesas@ideasonboard.com, geert+renesas@glider.be, linux-sh@vger.kernel.org, daniel.lezcano@linaro.org, horms+renesas@verge.net.au, Magnus Damm , tglx@linutronix.de Date: Sun, 21 Jun 2015 17:09:27 +0900 Message-Id: <20150621080927.10187.98007.sendpatchset@little-apple> In-Reply-To: <20150621080903.10187.20998.sendpatchset@little-apple> References: <20150621080903.10187.20998.sendpatchset@little-apple> Subject: [PATCH 02/08] clocksource: sh_cmt: Use 0x3f mask for SH_CMT_48BIT case Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Always use 0x3f as channel mask for the SH_CMT_48BIT type of devices. Once this patch is applied the "renesas,channels-mask" property will be ignored by the driver for older devices matching SH_CMT_48BIT. In the future when all CMT types store channel mask in the driver then we will be able to deprecate and remove "renesas,channels-mask" from DTS. Signed-off-by: Magnus Damm --- drivers/clocksource/sh_cmt.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in --- 0001/drivers/clocksource/sh_cmt.c +++ work/drivers/clocksource/sh_cmt.c 2015-06-20 15:25:54.302366518 +0900 @@ -74,6 +74,8 @@ enum sh_cmt_model { struct sh_cmt_info { enum sh_cmt_model model; + unsigned long channels_mask; + unsigned long width; /* 16 or 32 bit version of hardware block */ unsigned long overflow_bit; unsigned long clear_bits; @@ -212,6 +214,7 @@ static const struct sh_cmt_info sh_cmt_i }, [SH_CMT_48BIT] = { .model = SH_CMT_48BIT, + .channels_mask = 0x3f, .width = 32, .overflow_bit = SH_CMT32_CMCSR_CMF, .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF), @@ -969,9 +972,14 @@ static int sh_cmt_setup(struct sh_cmt_de id = of_match_node(sh_cmt_of_table, pdev->dev.of_node); cmt->info = id->data; - ret = sh_cmt_parse_dt(cmt); - if (ret < 0) - return ret; + /* prefer in-driver channel configuration over DT */ + if (cmt->info->channels_mask) { + cmt->hw_channels = cmt->info_channels_mask; + } else { + ret = sh_cmt_parse_dt(cmt); + if (ret < 0) + return ret; + } } else if (pdev->dev.platform_data) { struct sh_timer_config *cfg = pdev->dev.platform_data; const struct platform_device_id *id = pdev->id_entry;