From patchwork Sun Aug 23 07:24:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 7056871 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 09AC9C05AC for ; Sun, 23 Aug 2015 07:20:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 06EA7206FB for ; Sun, 23 Aug 2015 07:20:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EB195206F6 for ; Sun, 23 Aug 2015 07:20:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751242AbbHWHUh (ORCPT ); Sun, 23 Aug 2015 03:20:37 -0400 Received: from mail-pa0-f41.google.com ([209.85.220.41]:34566 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750905AbbHWHUg (ORCPT ); Sun, 23 Aug 2015 03:20:36 -0400 Received: by padfa11 with SMTP id fa11so1568229pad.1; Sun, 23 Aug 2015 00:20:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=1HMfk4q6AG8A7C6kSi4aaAwUVQA7kNYzrnIG+Gmdq2Y=; b=ASjRgtvKQLgAkuBzWM1lrx3NaMu727/EIpjn9QZklFDfnMSlrclI/j6fuun9ZYvuST iMM67D4+ffz8ZWQVGwnoClS1PgQsZqmA1LZ1HVUNnt7zRFQIeAa9tg9C9617JmEO6s4L ukcTuWFqJVs8NbABDUbrwE9ianFeXe6rbJVCBr6vzNT8ytFh85sG+81VwSSfq2X0Ak5a p/EyvTxkMij2fyM0glCXIheHvOk4z8cSwhrp+WHLYTefPUVvNG/x0KkGcvLjT39mUs8/ OjfgiOJWZxRNDk7mLLDykLP++Gn+ioAqNYg0el5LQGuJujtP1iWvSiq/pXqD+A6l3xHr zytg== X-Received: by 10.68.104.227 with SMTP id gh3mr34184246pbb.108.1440314436207; Sun, 23 Aug 2015 00:20:36 -0700 (PDT) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by smtp.gmail.com with ESMTPSA id uz5sm2980001pac.1.2015.08.23.00.20.32 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 23 Aug 2015 00:20:35 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com, keita.kobayashi.ym@renesas.com, horms@verge.net.au, geert@linux-m68k.org, laurent.pinchart@ideasonboard.com, Magnus Damm Date: Sun, 23 Aug 2015 16:24:39 +0900 Message-Id: <20150823072439.14156.96621.sendpatchset@little-apple> In-Reply-To: <20150823072427.14156.1960.sendpatchset@little-apple> References: <20150823072427.14156.1960.sendpatchset@little-apple> Subject: [PATCH v2 01/07] devicetree: bindings: Renesas APMU and SMP Enable method Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-8.0 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Add DT binding documentation for the APMU hardware and add "renesas,apmu" to the list of enable methods for the ARM cpus. Signed-off-by: Magnus Damm --- Changes since V1: - None Documentation/devicetree/bindings/arm/cpus.txt | 1 Documentation/devicetree/bindings/power/renesas,apmu.txt | 31 ++++++++++++++ 2 files changed, 32 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0001/Documentation/devicetree/bindings/arm/cpus.txt +++ work/Documentation/devicetree/bindings/arm/cpus.txt 2015-05-20 21:55:51.912366518 +0900 @@ -197,6 +197,7 @@ nodes to be present and contain the prop "qcom,gcc-msm8660" "qcom,kpss-acc-v1" "qcom,kpss-acc-v2" + "renesas,apmu" "rockchip,rk3066-smp" - cpu-release-addr --- /dev/null +++ work/Documentation/devicetree/bindings/power/renesas,apmu.txt 2015-05-20 22:39:34.872366518 +0900 @@ -0,0 +1,31 @@ +DT bindings for the Renesas Advanced Power Management Unit + +Renesas R-Car line of SoCs utilize one or more APMU hardware units +for CPU core power domain control including SMP boot and CPU Hotplug. + +Required properties: + +- compatible: Should be "renesas,apmu-", "renesas,apmu" as fallback. + Examples with soctypes are: + - "renesas,apmu-r8a7790" (R-Car H2) + - "renesas,apmu-r8a7791" (R-Car M2-W) + - "renesas,apmu-r8a7792" (R-Car V2H) + - "renesas,apmu-r8a7793" (R-Car M2-N) + - "renesas,apmu-r8a7794" (R-Car E2) + +- reg: Base address and length of the I/O registers used by the APMU. + +- cpus: This node contains a list of CPU cores, which should match the order + of CPU cores used by the WUPCR and PSTR registers in the Advanced Power + Management Until section of the device's datasheet. + + +Example: + +This shows the r8a7791 APMU that can control CPU0 and CPU1. + + apmu@e6152000 { + compatible = "renesas,apmu-r8a7791", "renesas,apmu"; + reg = <0 0xe6152000 0 0x188>; + cpus = <&cpu0 &cpu1>; + };