From patchwork Thu Sep 3 10:32:40 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 7115691 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 67E88BEEC1 for ; Thu, 3 Sep 2015 10:28:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6C92720813 for ; Thu, 3 Sep 2015 10:28:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6E99020812 for ; Thu, 3 Sep 2015 10:28:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753586AbbICK23 (ORCPT ); Thu, 3 Sep 2015 06:28:29 -0400 Received: from mail-pa0-f54.google.com ([209.85.220.54]:36358 "EHLO mail-pa0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752877AbbICK22 (ORCPT ); Thu, 3 Sep 2015 06:28:28 -0400 Received: by pacwi10 with SMTP id wi10so42883663pac.3 for ; Thu, 03 Sep 2015 03:28:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=IKQgwQwSiRCASKgKJBcGY99tPxuNZyZgSf3eDRh97QQ=; b=DXftLKxmpy0oFvnCO7yJ4RVk8YX71xLPoyNVxKz/6CcXYxOQwZwysiMDy1LFy5aOGs LSSifL60uHvbAERL+QrebPCC5nU3IG+Z8FBh/jBskqA3Y0jkrem25n99nLiaCsCp7orc rqEg5/aymPbODwu3dGitHcAlvfvLwjqwNPIgDAAH0fllQlghr8uc4l8dBZ5nyHAEV5e3 /eUM6Nt0YyP2S/IqLUig1b+XHejd15nmQ4TPnVFQW/tjXlyJUT2E59T5O4trepj/AB+6 T/sHIa9bGoZAQ4A4QaNp88qE/IfBK4vx16X1UyW/ncHJiJs67eoG88m97o7rvxS0xXHm P8jQ== X-Received: by 10.68.98.194 with SMTP id ek2mr65585249pbb.152.1441276107988; Thu, 03 Sep 2015 03:28:27 -0700 (PDT) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by smtp.gmail.com with ESMTPSA id j17sm24792477pdl.59.2015.09.03.03.28.20 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 Sep 2015 03:28:23 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Cc: takeshi.kihara.df@renesas.com, kuninori.morimoto.gx@renesas.com, gaku.inami.xw@bp.renesas.com, yoshihiro.shimoda.uh@renesas.com, hisao.munakata.vt@renesas.com, toshiaki.komatsu.ud@renesas.com, yusuke.goda.sx@renesas.com, horms@verge.net.au, geert@linux-m68k.org, laurent.pinchart@ideasonboard.com, Magnus Damm , yoshiyuki.ito.ub@renesas.com Date: Thu, 03 Sep 2015 19:32:40 +0900 Message-Id: <20150903103240.26791.6479.sendpatchset@little-apple> In-Reply-To: <20150903103217.26791.32559.sendpatchset@little-apple> References: <20150903103217.26791.32559.sendpatchset@little-apple> Subject: [PATCH v9 02/07][RFC] arm64: renesas: r8a7795 dtsi: Add all common divider clocks Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven Add all clocks generated from PLL1 by the CPG common divider block. Signed-off-by: Geert Uytterhoeven Signed-off-by: Magnus Damm --- TODO: - Figure out how this relates to the PLL1 issue in the CPG patch Changes since V8: (Magnus Damm ) - Updated commit message. Changes since V7: (Magnus Damm ) - Folded in s3d4_clk - Reordered to apply without SCIF bits Based on: [PATCH 3/3] arm64: renesas: r8a7795 dtsi: Add all common divider clocks arch/arm64/boot/dts/renesas/r8a7795.dtsi | 160 ++++++++++++++++++++++++++++++ 1 file changed, 160 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0012/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi 2015-08-29 17:10:36.532366518 +0900 @@ -70,6 +70,166 @@ #clock-cells = <1>; ranges; + zt_clk: zt { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7795_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <4>; + clock-mult = <1>; + }; + + ztr_clk: ztr { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7795_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <6>; + clock-mult = <1>; + }; + + ztrd2_clk: ztrd2 { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7795_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <12>; + clock-mult = <1>; + }; + + zx_clk: zx { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7795_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; + + s0_clk: s0 { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7795_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; + + s0d1_clk: s0d1 { + compatible = "fixed-factor-clock"; + clocks = <&s0_clk>; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + }; + + s0d4_clk: s0d4 { + compatible = "fixed-factor-clock"; + clocks = <&s0_clk>; + #clock-cells = <0>; + clock-div = <4>; + clock-mult = <1>; + }; + + s1_clk: s1 { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7795_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <3>; + clock-mult = <1>; + }; + + s1d1_clk: s1d1 { + compatible = "fixed-factor-clock"; + clocks = <&s1_clk>; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + }; + + s1d2_clk: s1d2 { + compatible = "fixed-factor-clock"; + clocks = <&s1_clk>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; + + s1d4_clk: s1d4 { + compatible = "fixed-factor-clock"; + clocks = <&s1_clk>; + #clock-cells = <0>; + clock-div = <4>; + clock-mult = <1>; + }; + + s2_clk: s2 { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7795_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <4>; + clock-mult = <1>; + }; + + s2d1_clk: s2d1 { + compatible = "fixed-factor-clock"; + clocks = <&s2_clk>; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + }; + + s2d2_clk: s2d2 { + compatible = "fixed-factor-clock"; + clocks = <&s2_clk>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; + + s2d4_clk: s2d4 { + compatible = "fixed-factor-clock"; + clocks = <&s2_clk>; + #clock-cells = <0>; + clock-div = <4>; + clock-mult = <1>; + }; + + s3_clk: s3 { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7795_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <6>; + clock-mult = <1>; + }; + + s3d1_clk: s3d1 { + compatible = "fixed-factor-clock"; + clocks = <&s3_clk>; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + }; + + s3d2_clk: s3d2 { + compatible = "fixed-factor-clock"; + clocks = <&s3_clk>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; + + s3d4_clk: s3d4 { + compatible = "fixed-factor-clock"; + clocks = <&s3_clk>; + #clock-cells = <0>; + clock-div = <4>; + clock-mult = <1>; + }; + + cl_clk: cl { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7795_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <48>; + clock-mult = <1>; + }; + cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7795-cpg-clocks", "renesas,rcar-gen3-cpg-clocks";