From patchwork Thu Oct 1 14:37:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 7309241 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6F0F7BEEA4 for ; Thu, 1 Oct 2015 14:37:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7929620697 for ; Thu, 1 Oct 2015 14:37:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 897A320620 for ; Thu, 1 Oct 2015 14:37:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753175AbbJAOho (ORCPT ); Thu, 1 Oct 2015 10:37:44 -0400 Received: from mail-pa0-f42.google.com ([209.85.220.42]:35598 "EHLO mail-pa0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750899AbbJAOhm (ORCPT ); Thu, 1 Oct 2015 10:37:42 -0400 Received: by pacfv12 with SMTP id fv12so78043589pac.2; Thu, 01 Oct 2015 07:37:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=MNXA1cq8hD9bcMysgzHMxM4VnnwxeuUVCwbNmJhm+hU=; b=qTsGpF3bQaWxEGqep4Yr4A2EeXWkGXuebcJIoss3+0/XQIiuCiKr5KfUPh8DSIuc1H RJkCQrPMfAiRWK76am3LiFv3yl1Vub1hKc/Ea5iMs/IPFO0j6wzNtJcAf1cODoK37Ht7 Y72FHD/7TYHvGZwZqD7LAi/0eGLQTmrhdSpitnK2+J13vjvx61ZV0KeRz230+z7zVlfw N6NYWxyM278V/hoLjsVfezCDaLCsEYVO0h5Orh17rlmKMFRCJt2fpMvXGg9bji9QOGnB ovGnC5LNl5T8q/OzlgO+LaoQajw1rxmVVHKaKFXwuLzX/iNYwwb622SmI6Evs57++azn c1cQ== X-Received: by 10.66.131.10 with SMTP id oi10mr12733532pab.87.1443710262374; Thu, 01 Oct 2015 07:37:42 -0700 (PDT) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by smtp.gmail.com with ESMTPSA id kw10sm7127235pbc.25.2015.10.01.07.37.39 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 01 Oct 2015 07:37:41 -0700 (PDT) From: Magnus Damm To: linux-clk@vger.kernel.org Cc: kuninori.morimoto.gx@renesas.com, gaku.inami.xw@bp.renesas.com, mturquette@baylibre.com, linux-sh@vger.kernel.org, sboyd@codeaurora.org, horms@verge.net.au, geert@linux-m68k.org, laurent.pinchart@ideasonboard.com, Magnus Damm Date: Thu, 01 Oct 2015 23:37:57 +0900 Message-Id: <20151001143757.20618.56442.sendpatchset@little-apple> In-Reply-To: <20151001143717.20618.26365.sendpatchset@little-apple> References: <20151001143717.20618.26365.sendpatchset@little-apple> Subject: [PATCH v8 04/05] clk: shmobile: Add r8a7795 MSSR support Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Hook up r8a7795 support to the MSSR driver, enable build for r8a7795, tie it into the r8a7795 CPG driver and add DT binding documentation. Signed-off-by: Magnus Damm --- Changes since V7: (Magnus Damm ) - New patch - DT documentation hunks nicked from patch by Geert - thanks! [PATCH v7 05/05] clk: shmobile: rcar-gen3: Add CPG/MSTP Clock Domain support Documentation/devicetree/bindings/clock/renesas,rcar-gen3-cpg-clocks.txt | 26 +++++++++- drivers/clk/shmobile/Makefile | 2 drivers/clk/shmobile/clk-mssr.c | 1 drivers/clk/shmobile/clk-rcar-gen3.c | 2 4 files changed, 28 insertions(+), 3 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0003/Documentation/devicetree/bindings/clock/renesas,rcar-gen3-cpg-clocks.txt +++ work/Documentation/devicetree/bindings/clock/renesas,rcar-gen3-cpg-clocks.txt 2015-10-01 23:23:59.780513000 +0900 @@ -2,6 +2,8 @@ The CPG generates core clocks for the R-Car Gen3 SoCs. It includes three PLLs and several fixed ratio dividers. +The CPG also provides a Clock Domain for SoC devices, in combination with the +CPG Module Stop (MSTP) Clocks. Required Properties: @@ -14,9 +16,17 @@ Required Properties: - clocks: References to the parent clocks: first to the EXTAL clock - #clock-cells: Must be 1 - clock-indices: Indices of the exported clocks + - #power-domain-cells: Must be 0 -Example -------- +SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed +through an MSTP clock should refer to the CPG device node in their +"power-domains" property, as documented by the generic PM domain bindings in +Documentation/devicetree/bindings/power/power_domain.txt. + +Examples +-------- + + - CPG device node: cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7795-cpg-clocks", @@ -29,4 +39,16 @@ Example R8A7795_CLK_PLL1 R8A7795_CLK_PLL2 R8A7795_CLK_PLL3 R8A7795_CLK_PLL4 >; + #power-domain-cells = <0>; + }; + + - CPG/MSTP Clock Domain member device node: + + scif2: serial@e6e88000 { + compatible = "renesas,scif-r8a7795", "renesas,scif"; + reg = <0 0xe6e88000 0 64>; + interrupts = ; + clocks = <&mstp3_clks RCAR_R8A7795_CLK_SCIF2>; + clock-names = "sci_ick"; + power-domains = <&cpg_clocks>; }; --- 0003/drivers/clk/shmobile/Makefile +++ work/drivers/clk/shmobile/Makefile 2015-10-01 18:52:50.160513000 +0900 @@ -8,5 +8,5 @@ obj-$(CONFIG_ARCH_R8A7790) += clk-rcar- obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o clk-mstp.o clk-div6.o obj-$(CONFIG_ARCH_R8A7793) += clk-rcar-gen2.o clk-mstp.o clk-div6.o obj-$(CONFIG_ARCH_R8A7794) += clk-rcar-gen2.o clk-mstp.o clk-div6.o -obj-$(CONFIG_ARCH_R8A7795) += clk-rcar-gen3.o clk-div6.o +obj-$(CONFIG_ARCH_R8A7795) += clk-rcar-gen3.o clk-mssr.o clk-div6.o obj-$(CONFIG_ARCH_SH73A0) += clk-sh73a0.o clk-mstp.o clk-div6.o --- 0004/drivers/clk/shmobile/clk-mssr.c +++ work/drivers/clk/shmobile/clk-mssr.c 2015-10-01 18:52:50.160513000 +0900 @@ -307,6 +307,7 @@ static void __init cpg_mssr_init(struct // TODO Register reset controller } +CLK_OF_DECLARE(cpg_mssr, "renesas,r8a7795-cpg-mssr", cpg_mssr_init); #ifdef CONFIG_PM_GENERIC_DOMAINS_OF --- 0003/drivers/clk/shmobile/clk-rcar-gen3.c +++ work/drivers/clk/shmobile/clk-rcar-gen3.c 2015-10-01 18:52:50.160513000 +0900 @@ -237,6 +237,8 @@ static void __init rcar_gen3_cpg_clocks_ cpg->data.clk_num = i; of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data); + + cpg_mssr_add_clk_domain(np); } CLK_OF_DECLARE(rcar_gen3_cpg_clks, "renesas,rcar-gen3-cpg-clocks", rcar_gen3_cpg_clocks_init);