From patchwork Sun Oct 18 05:13:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 7429551 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BF427BF90C for ; Sun, 18 Oct 2015 05:12:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DA3522077A for ; Sun, 18 Oct 2015 05:12:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E5FE8207A0 for ; Sun, 18 Oct 2015 05:12:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752830AbbJRFMy (ORCPT ); Sun, 18 Oct 2015 01:12:54 -0400 Received: from mail-pa0-f43.google.com ([209.85.220.43]:36105 "EHLO mail-pa0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751284AbbJRFMx (ORCPT ); Sun, 18 Oct 2015 01:12:53 -0400 Received: by pacfv9 with SMTP id fv9so60803375pac.3 for ; Sat, 17 Oct 2015 22:12:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=g9eQd5F+yFAK598RJLNhE5rJbLOQhkYWVjPibCTf5IY=; b=JbYWilwnxawM8hbhfdbzHf66/MkHkFnm2dEBXOFAT+Rox2UBPtckqP9iO0EYOrP+C2 SHbpxWJspuTLFELVW+AoxZqmO7wKtP5PdF0vNbBa3RiPf8XmDBcN9TJnC/2Lag2lEIpQ eZkeiLK37HIkF1L/H1HOgYr6gJArkDC4RaxZi3nlSbbLcUdpTAmaZFMe7ekTCXavC4nf SZBzyhvajQMyCzuWPh+LsNdSVHK7W3HCVWfZyScLkdLcQuT5uAnU8g6sHqMwbcSMGptN xRx8l1rsE+niGcM0t4qeJNQBvBdErbC3t/iUQKXt8U91O88PMzV1ywrMaMYCHxxM+bmx QLUQ== X-Received: by 10.68.242.130 with SMTP id wq2mr26091168pbc.117.1445145173300; Sat, 17 Oct 2015 22:12:53 -0700 (PDT) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by smtp.gmail.com with ESMTPSA id j16sm29305747pbq.23.2015.10.17.22.12.50 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 17 Oct 2015 22:12:52 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Cc: horms+renesas@verge.net.au, Magnus Damm , laurent.pinchart+renesas@ideasonboard.com, geert+renesas@glider.be Date: Sun, 18 Oct 2015 14:13:28 +0900 Message-Id: <20151018051328.746.54581.sendpatchset@little-apple> In-Reply-To: <20151018051319.746.85959.sendpatchset@little-apple> References: <20151018051319.746.85959.sendpatchset@little-apple> Subject: [PATCH 01/02] ARM: shmobile: r8a7794: Add DU device and MSTP clocks Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Add a DU device tree node for the r8a7794 SoC and hook it up to the required MSTP clocks. As usual the device is disabled by default and we rely on the board specific code to provide more board specific details and enable the device. Signed-off-by: Magnus Damm --- Written against renesas-devel-20151015-v4.3-rc5 No special compile time dependencies. Run time dependency on "drm: rcar-du: Add support for the R8A7794 DU" arch/arm/boot/dts/r8a7794.dtsi | 36 ++++++++++++++++++++++++++--- include/dt-bindings/clock/r8a7794-clock.h | 2 + 2 files changed, 35 insertions(+), 3 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0001/arch/arm/boot/dts/r8a7794.dtsi +++ work/arch/arm/boot/dts/r8a7794.dtsi 2015-10-18 13:44:22.130513000 +0900 @@ -750,6 +750,34 @@ }; }; + du: display@feb00000 { + compatible = "renesas,du-r8a7794"; + reg = <0 0xfeb00000 0 0x40000>; + reg-names = "du"; + interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>, + <0 268 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp7_clks R8A7794_CLK_DU0>, + <&mstp7_clks R8A7794_CLK_DU1>; + clock-names = "du.0", "du.1"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + du_out_rgb0: endpoint { + }; + }; + port@1 { + reg = <1>; + du_out_rgb1: endpoint { + }; + }; + }; + }; + clocks { #address-cells = <2>; #size-cells = <2>; @@ -1025,19 +1053,21 @@ reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; clocks = <&mp_clk>, <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, - <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>; + <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, + <&p_clk>, <&zx_clk>, <&zx_clk>; #clock-cells = <1>; clock-indices = < R8A7794_CLK_EHCI R8A7794_CLK_HSUSB R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5 R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0 R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1 - R8A7794_CLK_SCIF0 + R8A7794_CLK_SCIF0 R8A7794_CLK_DU1 R8A7794_CLK_DU0 >; clock-output-names = "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0", - "scif3", "scif2", "scif1", "scif0"; + "scif3", "scif2", "scif1", "scif0", + "du2", "du1"; }; mstp8_clks: mstp8_clks@e6150990 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; --- 0001/include/dt-bindings/clock/r8a7794-clock.h +++ work/include/dt-bindings/clock/r8a7794-clock.h 2015-10-18 13:44:22.130513000 +0900 @@ -79,6 +79,8 @@ #define R8A7794_CLK_SCIF2 19 #define R8A7794_CLK_SCIF1 20 #define R8A7794_CLK_SCIF0 21 +#define R8A7794_CLK_DU1 23 +#define R8A7794_CLK_DU0 24 /* MSTP8 */ #define R8A7794_CLK_VIN1 10