From patchwork Sat Jun 24 01:50:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 9807535 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9DE4F6032A for ; Sat, 24 Jun 2017 02:02:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8A46A287FF for ; Sat, 24 Jun 2017 02:02:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7E53128805; Sat, 24 Jun 2017 02:02:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E7E45287FF for ; Sat, 24 Jun 2017 02:02:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754925AbdFXCCA (ORCPT ); Fri, 23 Jun 2017 22:02:00 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:35705 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754889AbdFXCB5 (ORCPT ); Fri, 23 Jun 2017 22:01:57 -0400 Received: by mail-pf0-f193.google.com with SMTP id s66so9728626pfs.2 for ; Fri, 23 Jun 2017 19:01:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dabbelt-com.20150623.gappssmtp.com; s=20150623; h=from:to:to:to:to:to:cc:cc:cc:cc:cc:cc:cc:subject:date:message-id :in-reply-to:references; bh=I3UYDDds7/xTrvFg6acGYEUpm5vBrTzgePgcqScComc=; b=lpWEkkkqIcfkr6QMRPVwSShMMB+p8FmylJL9x32gUZ4fQFKL4qta/1b/vPvBqOl36s PhXaYGvfUovfXTtwRKI4MfcREhHAdMWyLmJ06Y9m7GHsAorRyMBuG2uMzBoC7jk8JWqT CS+F9WXizI1DvL1UEHecWQPn/8GMb/LHMDw2HzqdbjIiJicFYXTNDFFyeUW6jRkgI3LS G13e/bm1l4YvdlxngtVW9/itc7PS2lY8D/XSVyGoVGGMbFy/VUnHoDR5s1PqWtfg+4lb 7MRwcZGS1MQUgtRNMM3esklBN3bGo3LdyAVhm8CKTeqz4ty3khpgRAjxSM6dEhHkmNm9 +iRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:to:to:to:to:cc:cc:cc:cc:cc:cc:cc:subject :date:message-id:in-reply-to:references; bh=I3UYDDds7/xTrvFg6acGYEUpm5vBrTzgePgcqScComc=; b=e66TD60X8V9OpVp+tQ9u6hsleaiKPBtxdls9yznroIhWEda/c4NO+Sc0ftIH1gO1/r 5WLH4bWrSIzmkQIs/vooIUTQQFYaRBQ9hx5aZF4x/iPQp8Z2/OFlCfqzAPe3xtCzmYJt boIny5E5mZsi1TT0aULZ24/Icn2r2FwH3ymeSLOfLMDEliTB1ORBNlFeH1JLbH5Kzpsu vZCyGAExyVs4rU1IMu2fMdSK5k5wzJGnKUF7EP98aLbWJ8doT67UVgTd+E+UbHvoUJNy rYU51MBQoAPqJC++AxeJIbQE1ileUF0HjcCOeWKkaJXCTlZQwwRrHKrTMtLCe5HL+Ymq EJDg== X-Gm-Message-State: AKS2vOznVlhRrKnmGhO+9tn63rI/r32/6/AgqbXth3TtyDwcyo20BROc qmE59MgusoICQ3ND X-Received: by 10.101.90.141 with SMTP id c13mr3193081pgt.275.1498269716489; Fri, 23 Jun 2017 19:01:56 -0700 (PDT) Received: from localhost ([216.38.154.21]) by smtp.gmail.com with ESMTPSA id d2sm9567827pfb.49.2017.06.23.19.01.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Jun 2017 19:01:55 -0700 (PDT) From: Palmer Dabbelt To: linux-pci@vger.kernel.org To: linux-kernel@vger.kernel.org To: bhelgaas@google.com To: hch@infradead.org To: Arnd Bergmann Cc: linux-snps-arc@lists.infradead.org Cc: linux-cris-kernel@axis.com Cc: linux-ia64@vger.kernel.org Cc: linux-s390@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: Palmer Dabbelt Subject: [PATCH 2/3] pci: Add a generic, weakly-linked pcibios_align_resource Date: Fri, 23 Jun 2017 18:50:43 -0700 Message-Id: <20170624015044.16746-3-palmer@dabbelt.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170624015044.16746-1-palmer@dabbelt.com> References: <20170624015044.16746-1-palmer@dabbelt.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Multiple architectures define this as trivial function, and I'm adding another one as part of the RISC-V port. This adds a __weak version of pcibios_align_resource and deletes the now obselete ones in a handful of ports. The only functional change should be that a handful of ports used to export pcibios_fixup_bus. Only some architectures export this, so I just dropped it. Signed-off-by: Palmer Dabbelt --- arch/arc/kernel/pcibios.c | 9 --------- arch/arm64/kernel/pci.c | 9 --------- arch/ia64/pci/pci.c | 7 ------- arch/microblaze/pci/pci-common.c | 7 ------- arch/sparc/kernel/leon_pci.c | 6 ------ arch/sparc/kernel/pci.c | 6 ------ arch/sparc/kernel/pcic.c | 6 ------ arch/tile/kernel/pci.c | 10 ---------- arch/tile/kernel/pci_gx.c | 9 --------- drivers/pci/setup-res.c | 12 ++++++++++++ 10 files changed, 12 insertions(+), 69 deletions(-) diff --git a/arch/arc/kernel/pcibios.c b/arch/arc/kernel/pcibios.c index 1c8df8fd5fed..05aba5a7b5d2 100644 --- a/arch/arc/kernel/pcibios.c +++ b/arch/arc/kernel/pcibios.c @@ -7,12 +7,3 @@ */ #include - -/* - * We don't have to worry about legacy ISA devices, so nothing to do here - */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index 4c7f451aca05..9753ca23cfa1 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -23,15 +23,6 @@ #include /* - * We don't have to worry about legacy ISA devices, so nothing to do here - */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} - -/* * Try to assign the IRQ number when probing a new device */ int pcibios_alloc_irq(struct pci_dev *dev) diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 4068bde623dc..f5ec736100ee 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c @@ -411,13 +411,6 @@ pcibios_disable_device (struct pci_dev *dev) acpi_pci_irq_disable(dev); } -resource_size_t -pcibios_align_resource (void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} - /** * ia64_pci_get_legacy_mem - generic legacy mem routine * @bus: bus to get legacy memory base address for diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c index 940f266e5d5c..5835c09c6e26 100644 --- a/arch/microblaze/pci/pci-common.c +++ b/arch/microblaze/pci/pci-common.c @@ -823,13 +823,6 @@ void pcibios_setup_bus_devices(struct pci_bus *bus) * but we want to try to avoid allocating at 0x2900-0x2bff * which might have be mirrored at 0x0100-0x03ff.. */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} -EXPORT_SYMBOL(pcibios_align_resource); - int pcibios_add_device(struct pci_dev *dev) { dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); diff --git a/arch/sparc/kernel/leon_pci.c b/arch/sparc/kernel/leon_pci.c index 4371f72ff025..0eafdf3d036d 100644 --- a/arch/sparc/kernel/leon_pci.c +++ b/arch/sparc/kernel/leon_pci.c @@ -94,9 +94,3 @@ void pcibios_fixup_bus(struct pci_bus *pbus) } } } - -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c index 78d3dc25e126..3f8670c92951 100644 --- a/arch/sparc/kernel/pci.c +++ b/arch/sparc/kernel/pci.c @@ -690,12 +690,6 @@ struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm, return bus; } -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} - int pcibios_enable_device(struct pci_dev *dev, int mask) { u16 cmd, oldcmd; diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c index a38787b84322..e038e343f2c1 100644 --- a/arch/sparc/kernel/pcic.c +++ b/arch/sparc/kernel/pcic.c @@ -746,12 +746,6 @@ static void watchdog_reset() { } #endif -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} - int pcibios_enable_device(struct pci_dev *pdev, int mask) { return 0; diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c index 3113d4d5c329..8999a20ed9d1 100644 --- a/arch/tile/kernel/pci.c +++ b/arch/tile/kernel/pci.c @@ -67,16 +67,6 @@ static struct pci_ops tile_cfg_ops; /* - * We don't need to worry about the alignment of resources. - */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} -EXPORT_SYMBOL(pcibios_align_resource); - -/* * Open a FD to the hypervisor PCI device. * * controller_id is the controller number, config type is 0 or 1 for diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c index b89172b592cc..0a7642184a9a 100644 --- a/arch/tile/kernel/pci_gx.c +++ b/arch/tile/kernel/pci_gx.c @@ -108,15 +108,6 @@ static struct pci_ops tile_cfg_ops; /* Mask of CPUs that should receive PCIe interrupts. */ static struct cpumask intr_cpus_map; -/* We don't need to worry about the alignment of resources. */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, - resource_size_t align) -{ - return res->start; -} -EXPORT_SYMBOL(pcibios_align_resource); - /* * Pick a CPU to receive and handle the PCIe interrupts, based on the IRQ #. * For now, we simply send interrupts to non-dataplane CPUs. diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 85774b7a316a..597ed1f8b15c 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -234,6 +234,18 @@ static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev, return 0; } +/* + * We don't have to worry about legacy ISA devices, so nothing to do here. + * This is marked as __weak because multiple architectures define it, it should + * eventually go away. + */ +__attribute__ ((weak)) +resource_size_t pcibios_align_resource(void *data, const struct resource *res, + resource_size_t size, resource_size_t align) +{ + return res->start; +} + static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev, int resno, resource_size_t size, resource_size_t align) {