diff mbox series

[2/2] sh: dma: Correct the number of DMA channels in SH7709

Message ID 20230506141703.65605-3-contact@artur-rojek.eu (mailing list archive)
State New, archived
Headers show
Series SH7709 DMA fixes | expand

Commit Message

Artur Rojek May 6, 2023, 2:17 p.m. UTC
According to the PM, the DMAC found in SH7709 features only 4 channels.

Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
---
 arch/sh/drivers/dma/Kconfig | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

Comments

John Paul Adrian Glaubitz May 7, 2023, 8:33 a.m. UTC | #1
On Sat, 2023-05-06 at 16:17 +0200, Artur Rojek wrote:
> According to the PM, the DMAC found in SH7709 features only 4 channels.
> 
> Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
> ---
>  arch/sh/drivers/dma/Kconfig | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
> index 7d54f284ce10..4494d09597e9 100644
> --- a/arch/sh/drivers/dma/Kconfig
> +++ b/arch/sh/drivers/dma/Kconfig
> @@ -28,8 +28,9 @@ config SH_DMA_API
>  config NR_ONCHIP_DMA_CHANNELS
>  	int
>  	depends on SH_DMA
> -	default "4" if CPU_SUBTYPE_SH7750  || CPU_SUBTYPE_SH7751  || \
> -		       CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
> +	default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750  || \
> +		       CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7750S || \
> +		       CPU_SUBTYPE_SH7091
>  	default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
>  		       CPU_SUBTYPE_SH7760
>  	default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780  || \
> @@ -37,8 +38,9 @@ config NR_ONCHIP_DMA_CHANNELS
>  	default "6"
>  	help
>  	  This allows you to specify the number of channels that the on-chip
> -	  DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
> -	  SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
> +	  DMAC supports. This will be 4 for SH7709/SH7750/SH7751/Sh7750S/SH7091
> +	  and 8 for the SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724,
> +	  default is 6.
>  
>  config SH_DMABRG
>  	bool "SH7760 DMABRG support"

I will replace "PM" with "processor manual" since the acronym is not necessarily
unambiguous, at least I didn't know at first what you were referring to. I checked
the manual [1] myself and four DMA channels is correct, thus:

Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>

Adrian

> [1] https://www.renesas.com/us/en/document/mah/sh7709s-group-hardware-manual?r=1055106 (S. 373)
Geert Uytterhoeven May 8, 2023, 10:55 a.m. UTC | #2
On Sat, May 6, 2023 at 4:22 PM Artur Rojek <contact@artur-rojek.eu> wrote:
> According to the PM, the DMAC found in SH7709 features only 4 channels.
>
> Signed-off-by: Artur Rojek <contact@artur-rojek.eu>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- a/arch/sh/drivers/dma/Kconfig
> +++ b/arch/sh/drivers/dma/Kconfig
> @@ -28,8 +28,9 @@ config SH_DMA_API
>  config NR_ONCHIP_DMA_CHANNELS
>         int
>         depends on SH_DMA
> -       default "4" if CPU_SUBTYPE_SH7750  || CPU_SUBTYPE_SH7751  || \
> -                      CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
> +       default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750  || \
> +                      CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7750S || \
> +                      CPU_SUBTYPE_SH7091
>         default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
>                        CPU_SUBTYPE_SH7760
>         default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780  || \
> @@ -37,8 +38,9 @@ config NR_ONCHIP_DMA_CHANNELS
>         default "6"
>         help
>           This allows you to specify the number of channels that the on-chip
> -         DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the

Might be a good opportunity to s/Sh7750S/SH7750S/

> -         SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
> +         DMAC supports. This will be 4 for SH7709/SH7750/SH7751/Sh7750S/SH7091
> +         and 8 for the SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724,

... and sort the list for SoCs with 12 channels.

> +         default is 6.
>
>  config SH_DMABRG
>         bool "SH7760 DMABRG support"

Gr{oetje,eeting}s,

                        Geert
John Paul Adrian Glaubitz May 11, 2023, 8:20 p.m. UTC | #3
Hi Geert!

On Mon, 2023-05-08 at 12:55 +0200, Geert Uytterhoeven wrote:
> On Sat, May 6, 2023 at 4:22 PM Artur Rojek <contact@artur-rojek.eu> wrote:
> > According to the PM, the DMAC found in SH7709 features only 4 channels.
> > 
> > Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

I assume we can't find a commit for the Fixes tag? Looking at the "git blame"
for the Kconfig file, it seems the corresponding lines were changed before
the source tree was imported into git in 1da177e4c3f4.

> > --- a/arch/sh/drivers/dma/Kconfig
> > +++ b/arch/sh/drivers/dma/Kconfig
> > @@ -28,8 +28,9 @@ config SH_DMA_API
> >  config NR_ONCHIP_DMA_CHANNELS
> >         int
> >         depends on SH_DMA
> > -       default "4" if CPU_SUBTYPE_SH7750  || CPU_SUBTYPE_SH7751  || \
> > -                      CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
> > +       default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750  || \
> > +                      CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7750S || \
> > +                      CPU_SUBTYPE_SH7091
> >         default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
> >                        CPU_SUBTYPE_SH7760
> >         default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780  || \
> > @@ -37,8 +38,9 @@ config NR_ONCHIP_DMA_CHANNELS
> >         default "6"
> >         help
> >           This allows you to specify the number of channels that the on-chip
> > -         DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
> 
> Might be a good opportunity to s/Sh7750S/SH7750S/
> 
> > -         SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
> > +         DMAC supports. This will be 4 for SH7709/SH7750/SH7751/Sh7750S/SH7091
> > +         and 8 for the SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724,
> 
> ... and sort the list for SoCs with 12 channels.
> 
> > +         default is 6.
> > 
> >  config SH_DMABRG
> >         bool "SH7760 DMABRG support"

Good point. I will send a follow-up patch to clean that up.

Adrian
Geert Uytterhoeven May 12, 2023, 7:34 a.m. UTC | #4
Hi Adrian,

On Thu, May 11, 2023 at 10:20 PM John Paul Adrian Glaubitz
<glaubitz@physik.fu-berlin.de> wrote:
> On Mon, 2023-05-08 at 12:55 +0200, Geert Uytterhoeven wrote:
> > On Sat, May 6, 2023 at 4:22 PM Artur Rojek <contact@artur-rojek.eu> wrote:
> > > According to the PM, the DMAC found in SH7709 features only 4 channels.
> > >
> > > Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
> >
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> I assume we can't find a commit for the Fixes tag? Looking at the "git blame"
> for the Kconfig file, it seems the corresponding lines were changed before
> the source tree was imported into git in 1da177e4c3f4.

I don't think Fixes has much relevance, as the issue is present in all
LTS kernel versions that are still maintained.
The stable machinery AI will just pick it up, based on the word "correct" in
the description.

Gr{oetje,eeting}s,

                        Geert
John Paul Adrian Glaubitz May 12, 2023, 8:43 a.m. UTC | #5
On Fri, 2023-05-12 at 09:34 +0200, Geert Uytterhoeven wrote:
> Hi Adrian,
> 
> On Thu, May 11, 2023 at 10:20 PM John Paul Adrian Glaubitz
> <glaubitz@physik.fu-berlin.de> wrote:
> > On Mon, 2023-05-08 at 12:55 +0200, Geert Uytterhoeven wrote:
> > > On Sat, May 6, 2023 at 4:22 PM Artur Rojek <contact@artur-rojek.eu> wrote:
> > > > According to the PM, the DMAC found in SH7709 features only 4 channels.
> > > > 
> > > > Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
> > > 
> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > 
> > I assume we can't find a commit for the Fixes tag? Looking at the "git blame"
> > for the Kconfig file, it seems the corresponding lines were changed before
> > the source tree was imported into git in 1da177e4c3f4.
> 
> I don't think Fixes has much relevance, as the issue is present in all
> LTS kernel versions that are still maintained.
> The stable machinery AI will just pick it up, based on the word "correct" in
> the description.

Ah, I didn't know about that. Thanks for the clarification.

Adrian
diff mbox series

Patch

diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index 7d54f284ce10..4494d09597e9 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -28,8 +28,9 @@  config SH_DMA_API
 config NR_ONCHIP_DMA_CHANNELS
 	int
 	depends on SH_DMA
-	default "4" if CPU_SUBTYPE_SH7750  || CPU_SUBTYPE_SH7751  || \
-		       CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
+	default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750  || \
+		       CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7750S || \
+		       CPU_SUBTYPE_SH7091
 	default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
 		       CPU_SUBTYPE_SH7760
 	default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780  || \
@@ -37,8 +38,9 @@  config NR_ONCHIP_DMA_CHANNELS
 	default "6"
 	help
 	  This allows you to specify the number of channels that the on-chip
-	  DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
-	  SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
+	  DMAC supports. This will be 4 for SH7709/SH7750/SH7751/Sh7750S/SH7091
+	  and 8 for the SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724,
+	  default is 6.
 
 config SH_DMABRG
 	bool "SH7760 DMABRG support"