From patchwork Fri Dec 18 02:29:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 7878431 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D68E49F1C2 for ; Fri, 18 Dec 2015 02:30:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 07F262040F for ; Fri, 18 Dec 2015 02:30:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0DFA020155 for ; Fri, 18 Dec 2015 02:30:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966096AbbLRCaC (ORCPT ); Thu, 17 Dec 2015 21:30:02 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:39090 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966038AbbLRCaB (ORCPT ); Thu, 17 Dec 2015 21:30:01 -0500 Received: from reginn.isobedori.kobe.vergenet.net (p1027-ipbfp1401kobeminato.hyogo.ocn.ne.jp [114.152.28.27]) by kirsty.vergenet.net (Postfix) with ESMTPA id C76AA25B833; Fri, 18 Dec 2015 13:29:59 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1450405799; bh=KMdVN+gdM/mv9nJJRSuZ9vvQLQys0gWcTys9fZnE8Xs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S5dgEG52Li1dM/1uEcjGw5KSpngpvaY1yc8oE/T5HXWs/MYQSDKzdX+qnDUZg93Tz DOjfNFPqIGnNydT1BKIuGDlUgZWZc8T2E3hCBeA0E88zSYpTPIbmZNlpSCqFXF6kpc ZzC9xZubw5TG9ra3H0TmiKjdqT3NkUXTNufAg/sI= Received: by reginn.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 48CD7940679; Fri, 18 Dec 2015 11:29:58 +0900 (JST) From: Simon Horman To: linux-sh@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Geert Uytterhoeven , Simon Horman Subject: [PATCH 01/25] ARM: shmobile: sh73a0: Add MSIOF clocks Date: Fri, 18 Dec 2015 11:29:31 +0900 Message-Id: <23d711ab4dec7552cad8d03d12e253ac66e70a95.1450402264.git.horms+renesas@verge.net.au> X-Mailer: git-send-email 2.1.4 In-Reply-To: References: Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven The 4 MSIOF clocks are MSTP clocks, and children of the SUB clock. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0.dtsi | 28 ++++++++++++++++------------ include/dt-bindings/clock/sh73a0-clock.h | 6 +++++- 2 files changed, 21 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 319551f0fcdb..635564ab98ed 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -812,13 +812,13 @@ mstp0_clks: mstp0_clks@e6150130 { compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0xe6150130 4>, <0xe6150030 4>; - clocks = <&cpg_clocks SH73A0_CLK_HP>; + clocks = <&cpg_clocks SH73A0_CLK_HP>, <&sub_clk>; #clock-cells = <1>; clock-indices = < - SH73A0_CLK_IIC2 + SH73A0_CLK_IIC2 SH73A0_CLK_MSIOF0 >; clock-output-names = - "iic2"; + "iic2", "msiof0"; }; mstp1_clks: mstp1_clks@e6150134 { compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks"; @@ -848,20 +848,24 @@ reg = <0xe6150138 4>, <0xe6150040 4>; clocks = <&sub_clk>, <&cpg_clocks SH73A0_CLK_HP>, <&cpg_clocks SH73A0_CLK_HP>, <&sub_clk>, - <&sub_clk>, <&sub_clk>, <&sub_clk>, <&sub_clk>, - <&sub_clk>, <&sub_clk>; + <&sub_clk>, <&sub_clk>, <&sub_clk>, + <&sub_clk>, <&sub_clk>, <&sub_clk>, + <&sub_clk>, <&sub_clk>, <&sub_clk>; #clock-cells = <1>; clock-indices = < SH73A0_CLK_SCIFA7 SH73A0_CLK_SY_DMAC - SH73A0_CLK_MP_DMAC SH73A0_CLK_SCIFA5 - SH73A0_CLK_SCIFB SH73A0_CLK_SCIFA0 - SH73A0_CLK_SCIFA1 SH73A0_CLK_SCIFA2 - SH73A0_CLK_SCIFA3 SH73A0_CLK_SCIFA4 + SH73A0_CLK_MP_DMAC SH73A0_CLK_MSIOF3 + SH73A0_CLK_MSIOF1 SH73A0_CLK_SCIFA5 + SH73A0_CLK_SCIFB SH73A0_CLK_MSIOF2 + SH73A0_CLK_SCIFA0 SH73A0_CLK_SCIFA1 + SH73A0_CLK_SCIFA2 SH73A0_CLK_SCIFA3 + SH73A0_CLK_SCIFA4 >; clock-output-names = - "scifa7", "sy_dmac", "mp_dmac", "scifa5", - "scifb", "scifa0", "scifa1", "scifa2", - "scifa3", "scifa4"; + "scifa7", "sy_dmac", "mp_dmac", "msiof3", + "msiof1", "scifa5", "scifb", "msiof2", + "scifa0", "scifa1", "scifa2", "scifa3", + "scifa4"; }; mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/sh73a0-clock.h b/include/dt-bindings/clock/sh73a0-clock.h index 53369568c24c..2eca353a29d7 100644 --- a/include/dt-bindings/clock/sh73a0-clock.h +++ b/include/dt-bindings/clock/sh73a0-clock.h @@ -28,7 +28,8 @@ #define SH73A0_CLK_HP 14 /* MSTP0 */ -#define SH73A0_CLK_IIC2 1 +#define SH73A0_CLK_IIC2 1 +#define SH73A0_CLK_MSIOF0 0 /* MSTP1 */ #define SH73A0_CLK_CEU1 29 @@ -45,8 +46,11 @@ #define SH73A0_CLK_SCIFA7 19 #define SH73A0_CLK_SY_DMAC 18 #define SH73A0_CLK_MP_DMAC 17 +#define SH73A0_CLK_MSIOF3 15 +#define SH73A0_CLK_MSIOF1 8 #define SH73A0_CLK_SCIFA5 7 #define SH73A0_CLK_SCIFB 6 +#define SH73A0_CLK_MSIOF2 5 #define SH73A0_CLK_SCIFA0 4 #define SH73A0_CLK_SCIFA1 3 #define SH73A0_CLK_SCIFA2 2