diff mbox series

[RFC,v2,23/30] arch/sh: Add SH7751 SoC Internal periphreal devicetree.

Message ID 4bf42fc7a928e9a726ea20ee4e2168f993bb34f7.1694596125.git.ysato@users.sourceforge.jp (mailing list archive)
State New, archived
Headers show
Series Device Tree support for SH7751 based board | expand

Commit Message

Yoshinori Sato Sept. 13, 2023, 9:23 a.m. UTC
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
 arch/sh/boot/dts/sh7751.dtsi | 76 ++++++++++++++++++++++++++++++++++++
 1 file changed, 76 insertions(+)
 create mode 100644 arch/sh/boot/dts/sh7751.dtsi

Comments

Krzysztof Kozlowski Sept. 13, 2023, 10:49 a.m. UTC | #1
On 13/09/2023 11:23, Yoshinori Sato wrote:
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
>  arch/sh/boot/dts/sh7751.dtsi | 76 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 76 insertions(+)
>  create mode 100644 arch/sh/boot/dts/sh7751.dtsi
> 
> diff --git a/arch/sh/boot/dts/sh7751.dtsi b/arch/sh/boot/dts/sh7751.dtsi
> new file mode 100644
> index 000000000000..749eab3bce9f
> --- /dev/null
> +++ b/arch/sh/boot/dts/sh7751.dtsi
> @@ -0,0 +1,76 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the SH7751 SoC
> + */
> +
> +#include <dt-bindings/interrupt-controller/sh_intc.h>
> +#include <dt-bindings/clock/sh7750.h>
> +
> +/ {
> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		cpu@0 {
> +		      compatible = "renesas,sh7751r","renesas,sh4", "renesas,sh";

Except missing spaces and incorrect indentation, where is this
documented? Anyway it looks really odd to use such compatibles for CPUs.


Best regards,
Krzysztof
Geert Uytterhoeven Sept. 19, 2023, 12:41 p.m. UTC | #2
Hi Sato-san,

On Wed, Sep 13, 2023 at 11:24 AM Yoshinori Sato
<ysato@users.sourceforge.jp> wrote:
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

Thanks for your patch!

> --- /dev/null
> +++ b/arch/sh/boot/dts/sh7751.dtsi
> @@ -0,0 +1,76 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the SH7751 SoC
> + */
> +
> +#include <dt-bindings/interrupt-controller/sh_intc.h>
> +#include <dt-bindings/clock/sh7750.h>
> +
> +/ {

Missing top-level compatible property:

    compatible = "renesas,sh7751r";

And of course this compatible value should be documented in
Documentation/devicetree/bindings/soc/renesas/renesas.yaml

> +       cpus {
> +               #address-cells = <1>;
> +               #size-cells = <0>;

Please add a blank line between properties and subnodes.

> +               cpu@0 {
> +                     compatible = "renesas,sh7751r","renesas,sh4", "renesas,sh";
> +               };
> +       };
> +
> +       clocks {

s/clocks/soc/, and move everything below inside the "soc" container.

> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +               ranges;
> +
> +               cpg: cpg@ffc00000 {

Please use generic node names: clock-controller@ffc00000;

> +                       #clock-cells = <1>;
> +                       compatible = "renesas,sh7750-cpg";
> +                       clocks = <&xtal>;
> +                       reg = <0xffc00000 2>, <0xffc00008 4>;
> +               };
> +
> +       };
> +
> +       shintc: interrupt-controller@ffd00000 {
> +               compatible = "renesas,sh7751-intc";
> +               #interrupt-cells = <2>;
> +               #address-cells = <0>;
> +               interrupt-controller;
> +               reg = <0xffd00000 14>, <0xfe080000 128>;
> +       };
> +
> +       /* sci0 is rarely used, so it is not defined here. */
> +       scif1: serial@ffe80000 {
> +               compatible = "renesas,scif";

Please add (and document!) "renesas,scif-sh7751".

> +               reg = <0xffe80000 0x100>;
> +               interrupts = <evt2irq(0x700) 0>,
> +                            <evt2irq(0x720) 0>,
> +                            <evt2irq(0x760) 0>,
> +                            <evt2irq(0x740) 0>;
> +               interrupt-names = "eri", "rxi", "bri", "txi";

make dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/serial/renesas,scif.yaml

    serial@ffe80000: interrupt-names: 'oneOf' conditional failed, one
must be fixed:
        ['eri', 'rxi', 'bri', 'txi'] is too short
        'txi' was expected
        'bri' was expected

The "bri" and "txi" entries must be exchanged, both in the
"interrupts" and "interrupt-names" properties.

> +               clocks = <&cpg SH7750_CPG_FCK>;

clock-names = "fck";

> +       };
> +
> +       /* Normally ch0 and ch1 are used, so we will define ch0 to ch2 here. */
> +       tmu0: timer@ffd80008 {
> +               compatible = "renesas,tmu";

Please add (and document!) "renesas,tmu-sh7751".

> +               reg = <0xffd80000 12>;
> +               interrupts = <evt2irq(0x400) 0>,
> +                            <evt2irq(0x420) 0>,
> +                            <evt2irq(0x440) 0>,
> +                            <evt2irq(0x460) 0>;
> +               interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";

This will need an update to the bindings, and the driver, too.

> +               clocks = <&cpg SH7750_CPG_FCK>;

clock-names = "fck";

> +               renesas,channels = <3>;
> +       };

Gr{oetje,eeting}s,

                        Geert
Geert Uytterhoeven Sept. 19, 2023, 1:11 p.m. UTC | #3
Hi Sato-san,

On Wed, Sep 13, 2023 at 11:24 AM Yoshinori Sato
<ysato@users.sourceforge.jp> wrote:
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

> --- /dev/null
> +++ b/arch/sh/boot/dts/sh7751.dtsi
> @@ -0,0 +1,76 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the SH7751 SoC
> + */
> +
> +#include <dt-bindings/interrupt-controller/sh_intc.h>
> +#include <dt-bindings/clock/sh7750.h>
> +
> +/ {
> +       cpus {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               cpu@0 {
> +                     compatible = "renesas,sh7751r","renesas,sh4", "renesas,sh";
> +               };
> +       };
> +
> +       clocks {
> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +               ranges;
> +
> +               cpg: cpg@ffc00000 {
> +                       #clock-cells = <1>;
> +                       compatible = "renesas,sh7750-cpg";

renesas,sh7751-cpg?

> +                       clocks = <&xtal>;

Please provide an xtal (or extal) fixed-clock placeholder, to be
filled in by the board DTS.
(cfr. extal_clk in arch/arm64/boot/dts/renesas/r8a77951.dtsi)

> +                       reg = <0xffc00000 2>, <0xffc00008 4>;
> +               };
> +
> +       };

Gr{oetje,eeting}s,

                        Geert
diff mbox series

Patch

diff --git a/arch/sh/boot/dts/sh7751.dtsi b/arch/sh/boot/dts/sh7751.dtsi
new file mode 100644
index 000000000000..749eab3bce9f
--- /dev/null
+++ b/arch/sh/boot/dts/sh7751.dtsi
@@ -0,0 +1,76 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the SH7751 SoC
+ */
+
+#include <dt-bindings/interrupt-controller/sh_intc.h>
+#include <dt-bindings/clock/sh7750.h>
+
+/ {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		cpu@0 {
+		      compatible = "renesas,sh7751r","renesas,sh4", "renesas,sh";
+		};
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		cpg: cpg@ffc00000 {
+			#clock-cells = <1>;
+			compatible = "renesas,sh7750-cpg";
+			clocks = <&xtal>;
+			reg = <0xffc00000 2>, <0xffc00008 4>;
+		};
+
+	};
+
+	shintc: interrupt-controller@ffd00000 {
+		compatible = "renesas,sh7751-intc";
+		#interrupt-cells = <2>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0xffd00000 14>, <0xfe080000 128>;
+	};
+
+	/* sci0 is rarely used, so it is not defined here. */
+	scif1: serial@ffe80000 {
+		compatible = "renesas,scif";
+		reg = <0xffe80000 0x100>;
+		interrupts = <evt2irq(0x700) 0>,
+			     <evt2irq(0x720) 0>,
+			     <evt2irq(0x760) 0>,
+			     <evt2irq(0x740) 0>;
+		interrupt-names = "eri", "rxi", "bri", "txi";
+		clocks = <&cpg SH7750_CPG_FCK>;
+	};
+
+	/* Normally ch0 and ch1 are used, so we will define ch0 to ch2 here. */
+	tmu0: timer@ffd80008 {
+		compatible = "renesas,tmu";
+		reg = <0xffd80000 12>;
+		interrupts = <evt2irq(0x400) 0>,
+			     <evt2irq(0x420) 0>,
+			     <evt2irq(0x440) 0>,
+			     <evt2irq(0x460) 0>;
+		interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+		clocks = <&cpg SH7750_CPG_FCK>;
+		renesas,channels = <3>;
+	};
+
+	pci@fe200000 {
+		compatible = "renesas,sh7751-pci";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges = <0x02000000 0 0xfd000000 0xfd000000 0 0x01000000>,
+			 <0x01000000 0 0xfe240000 0xfe240000 0 0x00040000>;
+		reg = <0xfe200000 0x0400>,
+		      <0x0c000000 0x04000000>,
+		      <0xff800000 0x0030>;
+		#interrupt-cells = <1>;
+	};
+};