From patchwork Fri Sep 26 02:40:12 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Khiem Nguyen X-Patchwork-Id: 4978161 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9EF109F3DF for ; Fri, 26 Sep 2014 02:40:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C3C9A202AE for ; Fri, 26 Sep 2014 02:40:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C229120274 for ; Fri, 26 Sep 2014 02:40:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752591AbaIZCkP (ORCPT ); Thu, 25 Sep 2014 22:40:15 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:19991 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752386AbaIZCkO (ORCPT ); Thu, 25 Sep 2014 22:40:14 -0400 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie3.idc.renesas.com with ESMTP; 26 Sep 2014 11:40:13 +0900 Received: from relmlac4.idc.renesas.com (relmlac4.idc.renesas.com [10.200.69.24]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id 80B2544BD6; Fri, 26 Sep 2014 11:40:13 +0900 (JST) Received: by relmlac4.idc.renesas.com (Postfix, from userid 0) id 5E948480A6; Fri, 26 Sep 2014 11:40:13 +0900 (JST) Received: from relmlac4.idc.renesas.com (localhost [127.0.0.1]) by relmlac4.idc.renesas.com (Postfix) with ESMTP id 4D6E0480A4; Fri, 26 Sep 2014 11:40:13 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac4.idc.renesas.com with ESMTP id MBA09123; Fri, 26 Sep 2014 11:40:13 +0900 X-IronPort-AV: E=Sophos;i="5.04,602,1406559600"; d="scan'208";a="171053510" Received: from hqdg0130.wireless.renesas.com (HELO [10.161.20.130]) ([10.161.20.130]) by relmlii2.idc.renesas.com with ESMTP; 26 Sep 2014 11:40:12 +0900 Message-ID: <5424D20C.1090406@renesas.com> Date: Fri, 26 Sep 2014 11:40:12 +0900 From: Khiem Nguyen User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:31.0) Gecko/20100101 Thunderbird/31.1.2 MIME-Version: 1.0 To: Magnus Damm , Simon Horman CC: khiem.nguyen.xt@renesas.com, Linux-sh list , KEITA KOBAYASHI Subject: [PATCH RFC 4/7] ARM: shmobile: Backup and restore L2CTLR in Suspend-to-RAM Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This is needed for CA15 only, to maintain L2CTLR register value set in bootloader. Signed-off-by: Khiem Nguyen --- arch/arm/mach-shmobile/common.h | 2 ++ arch/arm/mach-shmobile/headsmp.S | 19 +++++++++++++++++++ arch/arm/mach-shmobile/platsmp-apmu.c | 8 ++++++++ 3 files changed, 29 insertions(+) diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h index 361bb3f..7990968 100644 --- a/arch/arm/mach-shmobile/common.h +++ b/arch/arm/mach-shmobile/common.h @@ -55,6 +55,8 @@ static inline int shmobile_cpufreq_init(void) { return 0; } extern void __iomem *shmobile_scu_base; extern phys_addr_t cpu_resume_phys_addr; extern void rcar_cpu_resume(void); +extern unsigned int is_a15_l2shutdown; +extern unsigned int l2ctlr_value; static inline void __init shmobile_init_late(void) { diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S index 800b53d..5afe65f 100644 --- a/arch/arm/mach-shmobile/headsmp.S +++ b/arch/arm/mach-shmobile/headsmp.S @@ -25,12 +25,31 @@ ENDPROC(shmobile_invalidate_start) ENTRY(rcar_cpu_resume) bl v7_invalidate_l1 + bl rcar_l2_restore ldr pc, 1f ENDPROC(rcar_cpu_resume) +ENTRY(rcar_l2_restore) + ldr r1, 2f + tst r0, #1 @ is CA15 + bne _exit_init_l2_a15 + + ldr r1, 3f + mcr p15, 1, r1, c9 , c0, 2 +_exit_init_l2_a15: + + mov pc, lr +ENDPROC(rcar_l2_restore) + .globl cpu_resume_phys_addr cpu_resume_phys_addr: 1: .space 4 + .globl is_a15_l2shutdown +is_a15_l2shutdown: +2: .space 4 + .globl l2ctlr_value +l2ctlr_value: +3: .space 4 /* * Reset vector for secondary CPUs. diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index fb6d3e5..f883697 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -229,6 +230,13 @@ static int shmobile_smp_apmu_enter_suspend(suspend_state_t state) gic_cpu_if_down(); writel_relaxed(0x2, cpucmcr); + if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A15) { + is_a15_l2shutdown = 1; + asm volatile("mrc p15, 1, %0, c9 , c0, 2" + : "=r" (l2ctlr_value)); + pr_debug("%s: l2ctlr: 0x%08x\n", __func__, l2ctlr_value); + } else + is_a15_l2shutdown = 0; shmobile_smp_hook(smp_processor_id(), virt_to_phys(rcar_cpu_resume), 0); cpu_suspend(smp_processor_id(), shmobile_smp_apmu_do_suspend);