From patchwork Mon Sep 29 05:05:44 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Khiem Nguyen X-Patchwork-Id: 4993381 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9EC51BEEA6 for ; Mon, 29 Sep 2014 05:05:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A19132025B for ; Mon, 29 Sep 2014 05:05:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6800F20254 for ; Mon, 29 Sep 2014 05:05:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751095AbaI2FFs (ORCPT ); Mon, 29 Sep 2014 01:05:48 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:44678 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750753AbaI2FFs (ORCPT ); Mon, 29 Sep 2014 01:05:48 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie2.idc.renesas.com with ESMTP; 29 Sep 2014 14:05:46 +0900 Received: from relmlac3.idc.renesas.com (relmlac3.idc.renesas.com [10.200.69.23]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id 8C1B23C190; Mon, 29 Sep 2014 14:05:46 +0900 (JST) Received: by relmlac3.idc.renesas.com (Postfix, from userid 0) id 8D75D180A4; Mon, 29 Sep 2014 14:05:46 +0900 (JST) Received: from relmlac3.idc.renesas.com (localhost [127.0.0.1]) by relmlac3.idc.renesas.com (Postfix) with ESMTP id 885FA180A1; Mon, 29 Sep 2014 14:05:46 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac3.idc.renesas.com with ESMTP id QAG23328; Mon, 29 Sep 2014 14:05:46 +0900 X-IronPort-AV: E=Sophos;i="5.04,617,1406559600"; d="scan'208";a="171207121" Received: from hqdg0130.wireless.renesas.com (HELO [10.161.20.130]) ([10.161.20.130]) by relmlii2.idc.renesas.com with ESMTP; 29 Sep 2014 14:05:44 +0900 Message-ID: <5428E8A8.80703@renesas.com> Date: Mon, 29 Sep 2014 14:05:44 +0900 From: Khiem Nguyen User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:31.0) Gecko/20100101 Thunderbird/31.1.2 MIME-Version: 1.0 To: Magnus Damm , Simon Horman , Linux-sh list , rjw@rjwysocki.net, Russell King CC: khiem.nguyen.xt@renesas.com, KEITA KOBAYASHI , Geert Uytterhoeven , sergei.shtylyov@cogentembedded.com Subject: [PATCH RFC v2 1/7] ARM: shmobile: use common ARMv7 cache disabling code Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The effort to consolidate ARMv7 cache disabling code via macro v7_exit_coherency_flush() was introduced by 'commit 39792c7cf311 ("ARM: 7861/1: cacheflush: consolidate single-CPU ARMv7 cache disabling code")'. The code was made use in core powerdown and cluster powerdown in other SoC. Hence, it's worth changing our code to use it. Signed-off-by: Khiem Nguyen --- arch/arm/mach-shmobile/platsmp-apmu.c | 27 +-------------------------- 1 file changed, 1 insertion(+), 26 deletions(-) diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index 3bfb1a0..21f8ddd 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -152,34 +152,9 @@ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle) #if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND) || \ defined(CONFIG_CPU_IDLE) -/* nicked from arch/arm/mach-exynos/hotplug.c */ static inline void cpu_enter_lowpower_a15(void) { - unsigned int v; - - asm volatile( - " mrc p15, 0, %0, c1, c0, 0\n" - " bic %0, %0, %1\n" - " mcr p15, 0, %0, c1, c0, 0\n" - : "=&r" (v) - : "Ir" (CR_C) - : "cc"); - - flush_cache_louis(); - - asm volatile( - /* - * Turn off coherency - */ - " mrc p15, 0, %0, c1, c0, 1\n" - " bic %0, %0, %1\n" - " mcr p15, 0, %0, c1, c0, 1\n" - : "=&r" (v) - : "Ir" (0x40) - : "cc"); - - isb(); - dsb(); + v7_exit_coherency_flush(louis); } void shmobile_smp_apmu_cpu_shutdown(unsigned int cpu)