From patchwork Mon Mar 30 21:30:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 6125511 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 69BD39F32E for ; Mon, 30 Mar 2015 21:30:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5FB7D202AE for ; Mon, 30 Mar 2015 21:30:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 309D5201CD for ; Mon, 30 Mar 2015 21:30:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753500AbbC3VaI (ORCPT ); Mon, 30 Mar 2015 17:30:08 -0400 Received: from mail-lb0-f176.google.com ([209.85.217.176]:32983 "EHLO mail-lb0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752723AbbC3VaH (ORCPT ); Mon, 30 Mar 2015 17:30:07 -0400 Received: by lbcmq2 with SMTP id mq2so104531651lbc.0 for ; Mon, 30 Mar 2015 14:30:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id:organization :user-agent:mime-version:content-transfer-encoding:content-type; bh=2rIfr73Y31iGsdtG63RdpFq852yzi+57cnJRpcpg4Fs=; b=judgyh721GG9BqTKMiN4KetTf1K41x806nUbugT76FR9bMjvusoz+K93NaInEY0Aeu tg8/JuD2qHKaGfHAvgFOfxwWLHsH3iKtuEI1l3u28eQ1Ua8WV+wG3dKgC1ULiURZwwBd op3v7/zCfNZUohIEPyWj+pXp4e6QCQccwtKnJQ5yCb503jd7Y/KyELEgh2Q/9RyWtyX/ 4Y42SvA5DUrm+s+OmDhTEeT+mSkgeEVKCx4AwN7Jz9Z9mYlgncL/XG4dP+C7ZzcHI6n/ dyB6evlupzbeFkFHAsnosQhAPbCPybpqbEgkpezUKvAyELvxvQu+LTylpaSgpqTO5gUX iRWA== X-Gm-Message-State: ALoCoQlMHcziz+UeLgv55b6Zf1VTupvtEm9+tEwibHHTF2mpF0dWd7IXk1dk4HefrjFcU87cB1rs X-Received: by 10.152.27.225 with SMTP id w1mr23254719lag.77.1427751005861; Mon, 30 Mar 2015 14:30:05 -0700 (PDT) Received: from wasted.cogentembedded.com (ppp83-237-251-118.pppoe.mtu-net.ru. [83.237.251.118]) by mx.google.com with ESMTPSA id dc10sm676238lac.25.2015.03.30.14.30.03 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 30 Mar 2015 14:30:04 -0700 (PDT) From: Sergei Shtylyov To: linus.walleij@linaro.org, linux-sh@vger.kernel.org, laurent.pinchart@ideasonboard.com, linux-gpio@vger.kernel.org Subject: [PATCH] sh-pfc: r8a7790: add EtherAVB pin groups Date: Tue, 31 Mar 2015 00:30:02 +0300 Message-ID: <5670474.zOZjp8RhU1@wasted.cogentembedded.com> Organization: Cogent Embedded Inc. User-Agent: KMail/4.14.4 (Linux/3.18.9-100.fc20.x86_64; KDE/4.14.6; x86_64; ; ) MIME-Version: 1.0 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add EtherAVB pin groups to R8A7790 PFC driver. Based on original patch by Mitsuhiro Kimura . Signed-off-by: Sergei Shtylyov Acked-by: Laurent Pinchart --- The patch is against the 'devel' branch of Linus W.'s 'linux-pinctrl.git' repo. drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 91 +++++++++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7790.c =================================================================== --- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -1799,6 +1799,81 @@ static const unsigned int audio_clkout_d static const unsigned int audio_clkout_d_mux[] = { AUDIO_CLKOUT_D_MARK, }; +/* - AVB -------------------------------------------------------------------- */ +static const unsigned int avb_link_pins[] = { + RCAR_GP_PIN(3, 11), +}; +static const unsigned int avb_link_mux[] = { + AVB_LINK_MARK, +}; +static const unsigned int avb_magic_pins[] = { + RCAR_GP_PIN(2, 14), +}; +static const unsigned int avb_magic_mux[] = { + AVB_MAGIC_MARK, +}; +static const unsigned int avb_phy_int_pins[] = { + RCAR_GP_PIN(2, 15), +}; +static const unsigned int avb_phy_int_mux[] = { + AVB_PHY_INT_MARK, +}; +static const unsigned int avb_mdio_pins[] = { + RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12), +}; +static const unsigned int avb_mdio_mux[] = { + AVB_MDC_MARK, AVB_MDIO_MARK, +}; +static const unsigned int avb_mii_pins[] = { + RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), + RCAR_GP_PIN(0, 11), + + RCAR_GP_PIN(3, 13), RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), + RCAR_GP_PIN(2, 2), + + RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9), + RCAR_GP_PIN(2, 10), RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 10), + RCAR_GP_PIN(3, 12), +}; +static const unsigned int avb_mii_mux[] = { + AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK, + AVB_TXD3_MARK, + + AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK, + AVB_RXD3_MARK, + + AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK, + AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_CLK_MARK, + AVB_COL_MARK, +}; +static const unsigned int avb_gmii_pins[] = { + RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), + RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13), + RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), + + RCAR_GP_PIN(3, 13), RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), + RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4), + RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 6), + + RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9), + RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 16), + RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), RCAR_GP_PIN(3, 10), + RCAR_GP_PIN(3, 12), +}; +static const unsigned int avb_gmii_mux[] = { + AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK, + AVB_TXD3_MARK, AVB_TXD4_MARK, AVB_TXD5_MARK, + AVB_TXD6_MARK, AVB_TXD7_MARK, + + AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK, + AVB_RXD3_MARK, AVB_RXD4_MARK, AVB_RXD5_MARK, + AVB_RXD6_MARK, AVB_RXD7_MARK, + + AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK, + AVB_CRS_MARK, AVB_GTX_CLK_MARK, AVB_GTXREFCLK_MARK, + AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK, + AVB_COL_MARK, +}; /* - DU RGB ----------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -3823,6 +3898,12 @@ static const struct sh_pfc_pin_group pin SH_PFC_PIN_GROUP(audio_clkout_b), SH_PFC_PIN_GROUP(audio_clkout_c), SH_PFC_PIN_GROUP(audio_clkout_d), + SH_PFC_PIN_GROUP(avb_link), + SH_PFC_PIN_GROUP(avb_magic), + SH_PFC_PIN_GROUP(avb_phy_int), + SH_PFC_PIN_GROUP(avb_mdio), + SH_PFC_PIN_GROUP(avb_mii), + SH_PFC_PIN_GROUP(avb_gmii), SH_PFC_PIN_GROUP(du_rgb666), SH_PFC_PIN_GROUP(du_rgb888), SH_PFC_PIN_GROUP(du_clk_out_0), @@ -4101,6 +4182,15 @@ static const char * const audio_clk_grou "audio_clkout_d", }; +static const char * const avb_groups[] = { + "avb_link", + "avb_magic", + "avb_phy_int", + "avb_mdio", + "avb_mii", + "avb_gmii", +}; + static const char * const du_groups[] = { "du_rgb666", "du_rgb888", @@ -4507,6 +4597,7 @@ static const char * const vin3_groups[] static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(audio_clk), + SH_PFC_FUNCTION(avb), SH_PFC_FUNCTION(du), SH_PFC_FUNCTION(du0), SH_PFC_FUNCTION(du1),