From patchwork Thu Nov 14 10:31:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 3181671 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5575D9F3A0 for ; Thu, 14 Nov 2013 10:31:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1DB722096D for ; Thu, 14 Nov 2013 10:31:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EE6972095C for ; Thu, 14 Nov 2013 10:31:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752778Ab3KNKbT (ORCPT ); Thu, 14 Nov 2013 05:31:19 -0500 Received: from mail-pb0-f45.google.com ([209.85.160.45]:61608 "EHLO mail-pb0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752030Ab3KNKbS (ORCPT ); Thu, 14 Nov 2013 05:31:18 -0500 Received: by mail-pb0-f45.google.com with SMTP id mc8so1840309pbc.18 for ; Thu, 14 Nov 2013 02:31:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:sender:message-id:to:cc:in-reply-to:references:from:subject :mime-version:content-type; bh=xS/N7yH4e6C70BCgzMPRt6prOEHjUCPnE+g6PFfUzQU=; b=KIgnsNsDLloXUU7OXY2sZzIjMBME7Qfs3ePzxMwpdnAvt9NvWBmc3P8sfYRLMD/UYX xTKBUqFIhVAGynhtdIGV+9I/RMyhFBjvsO+yNxQv1NwYy5d5nHdeosVzYgJuuOJK3Nm7 irhdpfYrQyEDv0yELUpmv5mdsdp+uftWhw1E1SqruVQQKcUOJZdDHGxZBqFRlB2oKLMt OnP4EwmFc6CSs+EfsdHsNWRwWJXv8vCt1KZ+nNkdAndW87LQcgsUebBESRnZbZW5+Z69 2Nyciu4wzz0VC8supANsZbIsfjHR1Tyz3CQbpMCrCIsJYX8ZkqhKMvmPD7ismZokSuvZ oq9g== X-Received: by 10.68.163.132 with SMTP id yi4mr698605pbb.152.1384425078210; Thu, 14 Nov 2013 02:31:18 -0800 (PST) Received: from morimoto-Dell-XPS420.gmail.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id xs1sm58214327pac.7.2013.11.14.02.31.15 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 14 Nov 2013 02:31:17 -0800 (PST) Date: Thu, 14 Nov 2013 02:31:17 -0800 (PST) Message-ID: <8738mzz34e.wl%kuninori.morimoto.gx@renesas.com> To: Chris Ball Cc: Simon , Laurent , Magnus , Linux-SH , Kuninori Morimoto , linux-mmc@vger.kernel.org In-Reply-To: <8761rvz37d.wl%kuninori.morimoto.gx@renesas.com> References: <87li0rz3to.wl%kuninori.morimoto.gx@renesas.com> <8761rvz37d.wl%kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH 10/17] mmc: tmio: add new TMIO_MMC_HAVE_HIGH_REG flags MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The accessibility checking method to the higher register was added by 69d1fe18e92afb4687605a1ab2ec73fbc3bae344 (mmc: tmio: only access registers above 0xff, if available) But, it doesn't care 32bit register. it is impossible to calculate it from resource size, since, there is 16/32 bit register IP (ex VERSION is located on 0xe2 if 16bit register, but it is located on 0x1c4 if 32bit register). This patch adds new TMIO_MMC_HAVE_HIGH_REG flags, tmio_mmc driver has it, and sh_mobile_sdhi doesn't has it today. Signed-off-by: Kuninori Morimoto --- drivers/mmc/host/tmio_mmc.c | 1 + drivers/mmc/host/tmio_mmc_pio.c | 14 ++++---------- include/linux/mfd/tmio.h | 7 +++++++ 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c index 6cfb2d5..8a781e2 100644 --- a/drivers/mmc/host/tmio_mmc.c +++ b/drivers/mmc/host/tmio_mmc.c @@ -91,6 +91,7 @@ static int tmio_mmc_probe(struct platform_device *pdev) /* SD control register space size is 0x200, 0x400 for bus_shift=1 */ pdata->bus_shift = resource_size(res_ctl) >> 10; + pdata->flags |= TMIO_MMC_HAVE_HIGH_REG; ret = tmio_mmc_host_probe(&host, pdev, pdata); if (ret) diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c index ed8fd5a..a55fe06 100644 --- a/drivers/mmc/host/tmio_mmc_pio.c +++ b/drivers/mmc/host/tmio_mmc_pio.c @@ -161,10 +161,8 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock) static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) { - struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); - /* implicit BUG_ON(!res) */ - if (resource_size(res) > 0x100) { + if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) { sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000); msleep(10); } @@ -176,14 +174,12 @@ static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) static void tmio_mmc_clk_start(struct tmio_mmc_host *host) { - struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); - sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 | sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); msleep(10); /* implicit BUG_ON(!res) */ - if (resource_size(res) > 0x100) { + if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) { sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100); msleep(10); } @@ -191,16 +187,14 @@ static void tmio_mmc_clk_start(struct tmio_mmc_host *host) static void tmio_mmc_reset(struct tmio_mmc_host *host) { - struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); - /* FIXME - should we set stop clock reg here */ sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); /* implicit BUG_ON(!res) */ - if (resource_size(res) > 0x100) + if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000); msleep(10); sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); - if (resource_size(res) > 0x100) + if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); msleep(10); } diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index 92f72cf..8f6f2e9 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -76,6 +76,13 @@ */ #define TMIO_MMC_USE_GPIO_CD (1 << 5) +/* + * Some controllers doesn't have over 0x100 register. + * it is used to checking accessibility of + * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL + */ +#define TMIO_MMC_HAVE_HIGH_REG (1 << 6) + int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base); int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base); void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);