From patchwork Wed Aug 7 04:06:19 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 2839766 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 09915BF535 for ; Wed, 7 Aug 2013 04:06:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D793F20137 for ; Wed, 7 Aug 2013 04:06:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B883F20122 for ; Wed, 7 Aug 2013 04:06:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751319Ab3HGEGV (ORCPT ); Wed, 7 Aug 2013 00:06:21 -0400 Received: from mail-pa0-f52.google.com ([209.85.220.52]:60730 "EHLO mail-pa0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751190Ab3HGEGU (ORCPT ); Wed, 7 Aug 2013 00:06:20 -0400 Received: by mail-pa0-f52.google.com with SMTP id kq13so1636587pab.11 for ; Tue, 06 Aug 2013 21:06:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:sender:message-id:to:cc:in-reply-to:references:from:subject :mime-version:content-type; bh=u5ygVyE2gi3PTTDtShutCU27roWYpHT3z0rab3jHGDo=; b=iXD96OBbvBM3t0fS6TbCUxXIWpKQKr7gDgQcSG3ZUBFPdycYCYVstiPyxPKHw8mUDJ PUgD88LK0Pe90CK6w7iayk4Wrw4aoGeoU0+Rv7pTX1crLPEknUtmZbSOemE5SJeNWeVM Md5QsU03d9AeCWgwIdl1gv6S9UxzK70GSuEYG2HR9CHTcI+ld2ThDhoNnbDXH6QeBXab 63ecbXXnc0Y94S4ohg5EGxZnC2DDd5SftPXpsK/DzzMh2Hqci1FQQBeG8TX4h7++i/9t 3st9rqL9tvXIvp4G4ku6eJzHcYU6DOJzy/+sTYazTR4sTfaLZvQIHkGYNvZscJfqb+yj NqvA== X-Received: by 10.68.143.73 with SMTP id sc9mr1562288pbb.2.1375848380421; Tue, 06 Aug 2013 21:06:20 -0700 (PDT) Received: from morimoto-Dell-XPS420.gmail.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id in2sm2186477pbc.37.2013.08.06.21.06.18 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 06 Aug 2013 21:06:19 -0700 (PDT) Date: Tue, 06 Aug 2013 21:06:19 -0700 (PDT) Message-ID: <8738qmjgav.wl%kuninori.morimoto.gx@renesas.com> To: Simon Cc: Magnus , linux-sh@vger.kernel.org, Kuninori Morimoto In-Reply-To: <874nb2jgc4.wl%kuninori.morimoto.gx@renesas.com> References: <874nb2jgc4.wl%kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH 1/5] sh-pfc: r8a7778: add SRU/SSI pin support MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY, UPPERCASE_50_75 autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Kuninori Morimoto --- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 163 ++++++++++++++++++++++++++++++++++ 1 file changed, 163 insertions(+) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c index 428d2a6..a1bc846 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c @@ -1304,6 +1304,22 @@ SH_PFC_MUX1(ether_link, ETH_LINK); SH_PFC_PINS(ether_magic, RCAR_GP_PIN(4, 20)); SH_PFC_MUX1(ether_magic, ETH_MAGIC); +/* - AUDIO macro -------------------------------------------------------------*/ +#define AUDIO_PFC_PIN(name, pin) SH_PFC_PINS(name, pin) +#define AUDIO_PFC_DAT(name, pin) SH_PFC_MUX1(name, pin) + +/* - AUDIO clock -------------------------------------------------------------*/ +AUDIO_PFC_PIN(audio_clk_a, RCAR_GP_PIN(2, 22)); +AUDIO_PFC_DAT(audio_clk_a, AUDIO_CLKA); +AUDIO_PFC_PIN(audio_clk_b, RCAR_GP_PIN(2, 23)); +AUDIO_PFC_DAT(audio_clk_b, AUDIO_CLKB); +AUDIO_PFC_PIN(audio_clk_c, RCAR_GP_PIN(2, 7)); +AUDIO_PFC_DAT(audio_clk_c, AUDIO_CLKC); +AUDIO_PFC_PIN(audio_clkout_a, RCAR_GP_PIN(2, 16)); +AUDIO_PFC_DAT(audio_clkout_a, AUDIO_CLKOUT_A); +AUDIO_PFC_PIN(audio_clkout_b, RCAR_GP_PIN(1, 16)); +AUDIO_PFC_DAT(audio_clkout_b, AUDIO_CLKOUT_B); + /* - SCIF macro ------------------------------------------------------------- */ #define SCIF_PFC_PIN(name, args...) SH_PFC_PINS(name, args) #define SCIF_PFC_DAT(name, tx, rx) SH_PFC_MUX2(name, tx, rx) @@ -1577,6 +1593,105 @@ SDHI_PFC_WPPN(sdhi2_wp_a, SD2_WP_A); SDHI_PFC_PINS(sdhi2_wp_b, RCAR_GP_PIN(3, 28)); SDHI_PFC_WPPN(sdhi2_wp_b, SD2_WP_B); +/* - SSI macro -------------------------------------------------------------- */ +#define SSI_PFC_PINS(name, args...) SH_PFC_PINS(name, args) +#define SSI_PFC_SETS(name, sck, ws, d) SH_PFC_MUX3(name, sck, ws, d) +#define SSI_PFC_MULT(name, sck, ws, d1, d2) SH_PFC_MUX4(name, sck, ws,\ + d1, d2) +/* - SSI0 --------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi0, RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), + RCAR_GP_PIN(3, 10)); +SSI_PFC_SETS(ssi0, SSI_SCK012, SSI_WS012, + SSI_SDATA0); + +/* - SSI01 -------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi01, RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), + RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 9)); +SSI_PFC_MULT(ssi01, SSI_SCK012, SSI_WS012, + SSI_SDATA0, SSI_SDATA1); + +/* - SSI012 -------------------------------------------------------------------*/ +static const unsigned ssi012_pins[] = { + RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), + RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 9), + RCAR_GP_PIN(3, 8), +}; + +static const unsigned int ssi012_mux[] = { + SSI_SCK012_MARK, SSI_WS012_MARK, + SSI_SDATA0_MARK, SSI_SDATA1_MARK, + SSI_SDATA2_MARK, +}; + +/* - SSI02 -------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi02, RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), + RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 8)); +SSI_PFC_MULT(ssi02, SSI_SCK012, SSI_WS012, + SSI_SDATA0, SSI_SDATA2); + +/* - SSI1 --------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi1_a, RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 21), + RCAR_GP_PIN(3, 9)); +SSI_PFC_SETS(ssi1_a, SSI_SCK1_A, SSI_WS1_A, + SSI_SDATA1); +SSI_PFC_PINS(ssi1_b, PIN_NUMBER(3, 20), RCAR_GP_PIN(1, 3), + RCAR_GP_PIN(3, 9)); +SSI_PFC_SETS(ssi1_b, SSI_SCK1_B, SSI_WS1_B, + SSI_SDATA1); + +/* - SSI2 --------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi2_a, RCAR_GP_PIN(2, 26), RCAR_GP_PIN(3, 4), + RCAR_GP_PIN(3, 8)); +SSI_PFC_SETS(ssi2_a, SSI_SCK2_A, SSI_WS2_A, + SSI_SDATA2); + +SSI_PFC_PINS(ssi2_b, RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 17), + RCAR_GP_PIN(3, 8)); +SSI_PFC_SETS(ssi2_b, SSI_SCK2_B, SSI_WS2_B, + SSI_SDATA2); + +/* - SSI3 --------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi3, RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), + RCAR_GP_PIN(3, 5)); +SSI_PFC_SETS(ssi3, SSI_SCK34, SSI_WS34, + SSI_SDATA3); + +/* - SSI34 -------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi34, RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), + RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 4)); +SSI_PFC_MULT(ssi34, SSI_SCK34, SSI_WS34, + SSI_SDATA3, SSI_SDATA4); + +/* - SSI4 --------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi4, RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 23), + RCAR_GP_PIN(3, 4)); +SSI_PFC_SETS(ssi4, SSI_SCK4, SSI_WS4, + SSI_SDATA4); + +/* - SSI5 --------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi5, RCAR_GP_PIN(2, 31), RCAR_GP_PIN(3, 0), + RCAR_GP_PIN(3, 1)); +SSI_PFC_SETS(ssi5, SSI_SCK5, SSI_WS5, + SSI_SDATA5); + +/* - SSI6 --------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi6, RCAR_GP_PIN(2, 28), RCAR_GP_PIN(2, 29), + RCAR_GP_PIN(2, 30)); +SSI_PFC_SETS(ssi6, SSI_SCK6, SSI_WS6, + SSI_SDATA6); + +/* - SSI7 --------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi7, RCAR_GP_PIN(2, 24), RCAR_GP_PIN(2, 25), + RCAR_GP_PIN(2, 27)); +SSI_PFC_SETS(ssi7, SSI_SCK78, SSI_WS78, + SSI_SDATA7); + +/* - SSI78 --------------------------------------------------------------------*/ +SSI_PFC_PINS(ssi78, RCAR_GP_PIN(2, 24), RCAR_GP_PIN(2, 25), + RCAR_GP_PIN(2, 27), RCAR_GP_PIN(2, 26)); +SSI_PFC_MULT(ssi78, SSI_SCK78, SSI_WS78, + SSI_SDATA7, SSI_SDATA8); + /* - USB0 ------------------------------------------------------------------- */ SH_PFC_PINS(usb0, RCAR_GP_PIN(0, 1)); SH_PFC_MUX1(usb0, PENC0); @@ -1624,6 +1739,11 @@ VIN_PFC_PINS(vin1_sync, RCAR_GP_PIN(3, 21), RCAR_GP_PIN(3, 22)); VIN_PFC_SYNC(vin1_sync, VI1_HSYNC, VI1_VSYNC); static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(audio_clk_a), + SH_PFC_PIN_GROUP(audio_clk_b), + SH_PFC_PIN_GROUP(audio_clk_c), + SH_PFC_PIN_GROUP(audio_clkout_a), + SH_PFC_PIN_GROUP(audio_clkout_b), SH_PFC_PIN_GROUP(ether_rmii), SH_PFC_PIN_GROUP(ether_link), SH_PFC_PIN_GROUP(ether_magic), @@ -1713,6 +1833,21 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(sdhi2_data4_b), SH_PFC_PIN_GROUP(sdhi2_wp_a), SH_PFC_PIN_GROUP(sdhi2_wp_b), + SH_PFC_PIN_GROUP(ssi0), + SH_PFC_PIN_GROUP(ssi01), + SH_PFC_PIN_GROUP(ssi012), + SH_PFC_PIN_GROUP(ssi02), + SH_PFC_PIN_GROUP(ssi1_a), + SH_PFC_PIN_GROUP(ssi1_b), + SH_PFC_PIN_GROUP(ssi2_a), + SH_PFC_PIN_GROUP(ssi2_b), + SH_PFC_PIN_GROUP(ssi3), + SH_PFC_PIN_GROUP(ssi34), + SH_PFC_PIN_GROUP(ssi4), + SH_PFC_PIN_GROUP(ssi5), + SH_PFC_PIN_GROUP(ssi6), + SH_PFC_PIN_GROUP(ssi7), + SH_PFC_PIN_GROUP(ssi78), SH_PFC_PIN_GROUP(usb0), SH_PFC_PIN_GROUP(usb0_ovc), SH_PFC_PIN_GROUP(usb1), @@ -1725,6 +1860,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(vin1_sync), }; +static const char * const audio_clk_groups[] = { + "audio_clk_a", + "audio_clk_b", + "audio_clk_c", + "audio_clkout_a", + "audio_clkout_b", +}; + static const char * const ether_groups[] = { "ether_rmii", "ether_link", @@ -1875,6 +2018,24 @@ static const char * const sdhi2_groups[] = { "sdhi2_wp_b", }; +static const char * const ssi_groups[] = { + "ssi0", + "ssi01", + "ssi012", + "ssi02", + "ssi1_a", + "ssi1_b", + "ssi2_a", + "ssi2_b", + "ssi3", + "ssi34", + "ssi4", + "ssi5", + "ssi6", + "ssi7", + "ssi78", +}; + static const char * const usb0_groups[] = { "usb0", "usb0_ovc", @@ -1898,6 +2059,7 @@ static const char * const vin1_groups[] = { }; static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(audio_clk), SH_PFC_FUNCTION(ether), SH_PFC_FUNCTION(hscif0), SH_PFC_FUNCTION(hscif1), @@ -1918,6 +2080,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(sdhi0), SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi2), + SH_PFC_FUNCTION(ssi), SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb1), SH_PFC_FUNCTION(vin0),