From patchwork Mon Dec 15 02:28:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 5489951 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AA5C9BEEA8 for ; Mon, 15 Dec 2014 02:29:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D2CEB20A03 for ; Mon, 15 Dec 2014 02:29:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0728A209BF for ; Mon, 15 Dec 2014 02:29:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751238AbaLOC3C (ORCPT ); Sun, 14 Dec 2014 21:29:02 -0500 Received: from relmlor4.renesas.com ([210.160.252.174]:43581 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751055AbaLOC3B (ORCPT ); Sun, 14 Dec 2014 21:29:01 -0500 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie3.idc.renesas.com with ESMTP; 15 Dec 2014 11:29:00 +0900 Received: from relmlac3.idc.renesas.com (relmlac3.idc.renesas.com [10.200.69.23]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id 6FD514198A; Mon, 15 Dec 2014 11:29:00 +0900 (JST) Received: by relmlac3.idc.renesas.com (Postfix, from userid 0) id 6127B1806F; Mon, 15 Dec 2014 11:29:00 +0900 (JST) Received: from relmlac3.idc.renesas.com (localhost [127.0.0.1]) by relmlac3.idc.renesas.com (Postfix) with ESMTP id 595BB1800A; Mon, 15 Dec 2014 11:29:00 +0900 (JST) Received: from relmlii1.idc.renesas.com [10.200.68.65] by relmlac3.idc.renesas.com with ESMTP id MAR00998; Mon, 15 Dec 2014 11:29:00 +0900 X-IronPort-AV: E=Sophos;i="5.07,577,1413212400"; d="scan'208";a="175701680" Received: from mail-sg1lp0090.outbound.protection.outlook.com (HELO APAC01-SG1-obe.outbound.protection.outlook.com) ([207.46.51.90]) by relmlii1.idc.renesas.com with ESMTP/TLS/AES256-SHA; 15 Dec 2014 11:28:59 +0900 Received: from remon.renesas.com (211.11.155.132) by HKXPR06MB167.apcprd06.prod.outlook.com (10.242.124.19) with Microsoft SMTP Server (TLS) id 15.1.36.22; Mon, 15 Dec 2014 02:28:57 +0000 Message-ID: <874msxve6d.wl%kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH 7/7] mmc: remove TMIO_MMC_HAVE_CTL_DMA_REG flag User-Agent: Wanderlust/2.14.0 Emacs/23.3 Mule/6.0 To: Ulf Hansson , Chris Ball CC: Simon , Linux-SH , linux-mmc In-Reply-To: <87egs1ve96.wl%kuninori.morimoto.gx@renesas.com> References: <87egs1ve96.wl%kuninori.morimoto.gx@renesas.com> MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Date: Mon, 15 Dec 2014 02:28:57 +0000 X-Originating-IP: [211.11.155.132] X-ClientProxiedBy: SINPR01CA0038.apcprd01.prod.exchangelabs.com (10.141.109.38) To HKXPR06MB167.apcprd06.prod.outlook.com (10.242.124.19) X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:HKXPR06MB167; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601003); SRVR:HKXPR06MB167; X-Forefront-PRVS: 04267075BD X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10019020)(6009001)(199003)(189002)(53416004)(106356001)(23726002)(105586002)(4396001)(42186005)(33646002)(64706001)(47776003)(20776003)(69596002)(81156004)(31966008)(50466002)(19580405001)(76176999)(46102003)(19580395003)(83506001)(21056001)(101416001)(77156002)(62966003)(40100003)(36756003)(122386002)(120916001)(50986999)(68736005)(77096005)(87976001)(54356999)(92566001)(46406003)(107046002)(66066001)(86362001)(99396003)(229853001)(97736003); DIR:OUT; SFP:1102; SCL:1; SRVR:HKXPR06MB167; H:remon.renesas.com; FPR:; SPF:None; MLV:sfv; PTR:InfoNoRecords; A:1; MX:1; LANG:en; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:HKXPR06MB167; X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Dec 2014 02:28:57.3188 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: HKXPR06MB167 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kuninori Morimoto tmio_mmc_host has .enable_dma callback now. We don't need TMIO_MMC_HAVE_CTL_DMA_REG anymore. Let's remove it Signed-off-by: Kuninori Morimoto --- drivers/mmc/host/sh_mobile_sdhi.c | 5 ----- drivers/mmc/host/tmio_mmc_dma.c | 3 --- include/linux/mfd/tmio.h | 5 ----- 3 files changed, 13 deletions(-) diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c index 9d65fae..e2c520e 100644 --- a/drivers/mmc/host/sh_mobile_sdhi.c +++ b/drivers/mmc/host/sh_mobile_sdhi.c @@ -299,11 +299,6 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev) */ mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK; - /* - * All SDHI have DMA control register - */ - mmc_data->flags |= TMIO_MMC_HAVE_CTL_DMA_REG; - if (of_id && of_id->data) { const struct sh_mobile_sdhi_of_data *of_data = of_id->data; mmc_data->flags |= of_data->tmio_flags; diff --git a/drivers/mmc/host/tmio_mmc_dma.c b/drivers/mmc/host/tmio_mmc_dma.c index be82257..c2226cc 100644 --- a/drivers/mmc/host/tmio_mmc_dma.c +++ b/drivers/mmc/host/tmio_mmc_dma.c @@ -28,9 +28,6 @@ void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) if (!host->chan_tx || !host->chan_rx) return; - if (host->pdata->flags & TMIO_MMC_HAVE_CTL_DMA_REG) - sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0); - if (host->pdata->dma->enable) host->pdata->dma->enable(host, enable); } diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index 85bd65b..ff2eb93 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -97,11 +97,6 @@ #define TMIO_MMC_SDIO_STATUS_QUIRK (1 << 8) /* - * Some controllers have DMA enable/disable register - */ -#define TMIO_MMC_HAVE_CTL_DMA_REG (1 << 9) - -/* * Some controllers allows to set SDx actual clock */ #define TMIO_MMC_CLK_ACTUAL (1 << 10)