From patchwork Wed Oct 2 08:38:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 2973481 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BA2CE9F88A for ; Wed, 2 Oct 2013 08:38:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9B03420397 for ; Wed, 2 Oct 2013 08:38:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F17B320399 for ; Wed, 2 Oct 2013 08:38:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753492Ab3JBIi1 (ORCPT ); Wed, 2 Oct 2013 04:38:27 -0400 Received: from mail-pa0-f41.google.com ([209.85.220.41]:48663 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753185Ab3JBIiY (ORCPT ); Wed, 2 Oct 2013 04:38:24 -0400 Received: by mail-pa0-f41.google.com with SMTP id bj1so735533pad.28 for ; Wed, 02 Oct 2013 01:38:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:sender:message-id:to:cc:in-reply-to:references:from:subject :mime-version:content-type; bh=GO+4RE6vaDIi6OCCDSz7LRWPvXuvdxCncNuFdiG60jQ=; b=tsW4fjndkEwWoYMeFgQ4NNV7iq3Nof/5KkkRzzFLPp8yf4UvWV1Q/7m1H0m9XUUQfQ e8p0pZ6T2HPZFvBRCuSEg/c22h5AlSyvOVi5ntcnuPSJU1DKaW93Ojv9Veb/exblFg+h JsMInaKVSRHvMVEBdfLmQYrfvyoQA6ReyT8z5x8Ywtl2TUsHKslfJc8YwupGh4B+XvKK 4J3jOPtn2E/vrHo9oJ72d550IXjnPuKMSgtkembRvy4+4T4BNRB4q+j16ePz6J0V9O1U B9Xu7ODgJJvgYBDUXlilB/glAcrcKjfRckcykT3RItvL1iYs0nGjzjD0AsZLunFuHns7 XMGw== X-Received: by 10.68.101.225 with SMTP id fj1mr1320719pbb.8.1380703103981; Wed, 02 Oct 2013 01:38:23 -0700 (PDT) Received: from morimoto-Dell-XPS420.gmail.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id ct4sm666423pbb.41.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 02 Oct 2013 01:38:23 -0700 (PDT) Date: Wed, 02 Oct 2013 01:38:23 -0700 (PDT) Message-ID: <87a9isysn8.wl%kuninori.morimoto.gx@renesas.com> To: Simon Cc: Magnus , linux-sh@vger.kernel.org, Kuninori Morimoto In-Reply-To: <87bo38yspg.wl%kuninori.morimoto.gx@renesas.com> References: <87siwkyz3n.wl%kuninori.morimoto.gx@renesas.com> <87bo38yspg.wl%kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH 1/4 v2] ARM: shmobile: r8a7779: split r8a7779_init_irq_extpin() for DT MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP r8a7779 INTC needs IRL pin mode settings to determine behavior of IRQ0 - IRQ3, and r8a7779_init_irq_extpin() is controlling it via irlm parameter. But this function registers renesas_intc_irqpin driver if irlm was set, and this value depends on platform. This is not good for DT. This patch splits r8a7779_init_irq_extpin() function into "mode settings" and "funtion register" parts Signed-off-by: Kuninori Morimoto --- v1 -> v2 - patch was splited, only SoC file arch/arm/mach-shmobile/include/mach/r8a7779.h | 1 + arch/arm/mach-shmobile/setup-r8a7779.c | 6 +++++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h index 31e87b9..17af34e 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7779.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h @@ -33,6 +33,7 @@ static inline struct r8a7779_pm_ch *to_r8a7779_ch(struct generic_pm_domain *d) extern void r8a7779_init_delay(void); extern void r8a7779_init_irq_extpin(int irlm); +extern void r8a7779_init_irq_extpin_dt(int irlm); extern void r8a7779_init_irq_dt(void); extern void r8a7779_map_io(void); extern void r8a7779_earlytimer_init(void); diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index eacb2f7..13049e9 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -98,7 +98,7 @@ static struct resource irqpin0_resources[] __initdata = { DEFINE_RES_IRQ(gic_spi(30)), /* IRQ3 */ }; -void __init r8a7779_init_irq_extpin(int irlm) +void __init r8a7779_init_irq_extpin_dt(int irlm) { void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE); u32 tmp; @@ -116,7 +116,11 @@ void __init r8a7779_init_irq_extpin(int irlm) tmp |= (1 << 21); /* LVLMODE = 1 */ iowrite32(tmp, icr0); iounmap(icr0); +} +void __init r8a7779_init_irq_extpin(int irlm) +{ + r8a7779_init_irq_extpin_dt(irlm); if (irlm) platform_device_register_resndata( &platform_bus, "renesas_intc_irqpin", -1,