From patchwork Mon Nov 26 06:01:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 1800581 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 4D7FFDF2F9 for ; Mon, 26 Nov 2012 06:01:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752282Ab2KZGBs (ORCPT ); Mon, 26 Nov 2012 01:01:48 -0500 Received: from mail-da0-f46.google.com ([209.85.210.46]:41317 "EHLO mail-da0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751330Ab2KZGBr (ORCPT ); Mon, 26 Nov 2012 01:01:47 -0500 Received: by mail-da0-f46.google.com with SMTP id p5so3560023dak.19 for ; Sun, 25 Nov 2012 22:01:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:sender:message-id:to:cc:in-reply-to:references:from:subject :mime-version:content-type; bh=3Y3N/yqPgvj2rNKmdHU5XtK4q5fyfvr0LLcUrlu1RS4=; b=BP242GtBqUIWR0NoLZ+so+TTQ68JtEnhWQZKh+ST0o7/4C/jfJrIf3Ul/KljsQ2Rhf nUrPuQ0tWnw0Eo2k6dN8/xA9ZdtWw6hczdtMqwngqZdXAfgcRuotRa3y11b8lYaYUo8E bo2PcKPsNSnNYqVQL+GSnIjmGQvmpeU0TcSDGItaodekvC97AnVhBPANDYUoiC+0r1Sd 1E0f56uFj9g7LgTnCUC/KGvScUW4vmWNzkFBemaDfZHsN0xt+RP3pe/AmcOd+LVEgB7W dnsxyp0+avLjfPbd9MVDJb95d+IuKNSG6aT2wNsw9GqIwDKibj2xJn0/Ti/sEI7Eae7I hSGQ== Received: by 10.68.241.73 with SMTP id wg9mr34383839pbc.3.1353909706964; Sun, 25 Nov 2012 22:01:46 -0800 (PST) Received: from morimoto-Dell-XPS420.gmail.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPS id a8sm8185875paz.18.2012.11.25.22.01.44 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 25 Nov 2012 22:01:46 -0800 (PST) Date: Sun, 25 Nov 2012 22:01:46 -0800 (PST) Message-ID: <87a9u4x5q1.wl%kuninori.morimoto.gx@renesas.com> To: Paul Mundt Cc: Simon , Magnus , linux-sh@vger.kernel.org, Kuninori Morimoto In-Reply-To: <20121101002233.GC24257@linux-sh.org> References: <87pq45mxd9.wl%kuninori.morimoto.gx@renesas.com> <20121027074529.GA32370@linux-sh.org> <87625rm8gj.wl%kuninori.morimoto.gx@renesas.com> <20121101002233.GC24257@linux-sh.org> From: Kuninori Morimoto Subject: [PATCH v2] sh: clkfwk: bugfix: sh_clk_div_enable() care sh_clk_div_set_rate() if div6 MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org 764f4e4e33d18cde4dcaf8a0d860b749c6d6d08b (sh: clkfwk: Use shared sh_clk_div_enable/disable()) shared enable/disable funcions for div4/div6. But new sh_clk_div_enable() didn't care sh_clk_div_set_rate() which is required on div6 clock. This patch fixes it. Signed-off-by: Kuninori Morimoto --- >> Paul This is v2 patch of sh_clk_div_disable() bugfix. it used SH_CLK_DIV6_MSK as you indicated. Sorry for my late response. drivers/sh/clk/cpg.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c index 07e9fb4..d118bac 100644 --- a/drivers/sh/clk/cpg.c +++ b/drivers/sh/clk/cpg.c @@ -126,6 +126,12 @@ static int sh_clk_div_set_rate(struct clk *clk, unsigned long rate) static int sh_clk_div_enable(struct clk *clk) { + if (clk->div_mask == SH_CLK_DIV6_MSK) { + int ret = sh_clk_div_set_rate(clk, clk->rate); + if (ret < 0) + return ret; + } + sh_clk_write(sh_clk_read(clk) & ~CPG_CKSTP_BIT, clk); return 0; }