From patchwork Tue Jan 28 04:45:36 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 3545091 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 894CFC02DC for ; Tue, 28 Jan 2014 04:45:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A81DE20138 for ; Tue, 28 Jan 2014 04:45:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BC44020127 for ; Tue, 28 Jan 2014 04:45:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754436AbaA1Epi (ORCPT ); Mon, 27 Jan 2014 23:45:38 -0500 Received: from mail-pa0-f48.google.com ([209.85.220.48]:56059 "EHLO mail-pa0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754408AbaA1Eph (ORCPT ); Mon, 27 Jan 2014 23:45:37 -0500 Received: by mail-pa0-f48.google.com with SMTP id kx10so6818541pab.7 for ; Mon, 27 Jan 2014 20:45:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:message-id:from:subject:user-agent:to:cc:in-reply-to :references:mime-version:content-type; bh=W/SQ8TDozDykuLd13pygyy2F0w/U2SSm24RhVbMp+Zk=; b=WRip3hl+D+RzLR0hm8Ll6T0R/MoPqRWlqouKDEypdzFDms3fbZddx4QIummpqVird/ D+JgU56vbT4QHI3A1Bx3bVL0fOkWd7tXzXH2EjpwE9d63sjrHpi5HHiwl/XrD5QnpOs+ ufTGpVog3oIEhq4eBdUeoYsvKKKe0vCuQFNdHJrhlfQ/t9QNYRGy1vjrEuOIlxI+TZw2 64Ib0FzSQbzL32s50/jqaM4bxaQSq0nHHJH1B//822vRyOdAoiwBMQCWyCHsxr1lEXCc Z0LOZ4LNe7JG+Eh6Ubkiq+PAEm1NxBYXprlmI5s2ovozIf4WFqmPbqQkd8bVGL3rDH17 9eAg== X-Received: by 10.68.194.97 with SMTP id hv1mr6890207pbc.162.1390884336789; Mon, 27 Jan 2014 20:45:36 -0800 (PST) Received: from morimoto-Dell-XPS420.gmail.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id sy10sm100935835pac.15.2014.01.27.20.45.33 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 27 Jan 2014 20:45:36 -0800 (PST) Date: Mon, 27 Jan 2014 20:45:36 -0800 (PST) Message-ID: <87fvo890k4.wl%kuninori.morimoto.gx@gmail.com> From: Kuninori Morimoto Subject: [PATCH 4/4] mmc: SDHI: updata sh_mobile_sdhi_of_data for r8a7790 User-Agent: Wanderlust/2.14.0 Emacs/23.3 Mule/6.0 To: Simon , Chris Ball Cc: Magnus , Linux-SH , linux-mmc@vger.kernel.org In-Reply-To: <87lhy090m0.wl%kuninori.morimoto.gx@gmail.com> References: <87lhy090m0.wl%kuninori.morimoto.gx@gmail.com> MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kuninori Morimoto This patch updates r8a7790 DT data to have SoC specific settings. Latest Renesas Chip has some SDHI channels and the WP pin availability depends on its channel or HW implementation. Thus, this patch disables it as default, but we can use wp-gpios property to enable it. Signed-off-by: Kuninori Morimoto --- arch/arm/boot/dts/r8a7790.dtsi | 4 ---- drivers/mmc/host/sh_mobile_sdhi.c | 10 +++++++++- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index f48487c..df578cd 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -265,7 +265,6 @@ interrupt-parent = <&gic>; interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; - cap-sd-highspeed; status = "disabled"; }; @@ -275,7 +274,6 @@ interrupt-parent = <&gic>; interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7790_CLK_SDHI1>; - cap-sd-highspeed; status = "disabled"; }; @@ -285,7 +283,6 @@ interrupt-parent = <&gic>; interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7790_CLK_SDHI2>; - cap-sd-highspeed; status = "disabled"; }; @@ -295,7 +292,6 @@ interrupt-parent = <&gic>; interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7790_CLK_SDHI3>; - cap-sd-highspeed; status = "disabled"; }; diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c index 322cd35..7498f5b 100644 --- a/drivers/mmc/host/sh_mobile_sdhi.c +++ b/drivers/mmc/host/sh_mobile_sdhi.c @@ -38,6 +38,7 @@ struct sh_mobile_sdhi_of_data { unsigned long tmio_flags; unsigned long capabilities; + unsigned long capabilities2; }; static const struct sh_mobile_sdhi_of_data sh_mobile_sdhi_of_cfg[] = { @@ -51,6 +52,12 @@ static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = { .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, }; +static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = { + .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE, + .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, + .capabilities2 = MMC_CAP2_NO_MULTI_READ, +}; + static const struct of_device_id sh_mobile_sdhi_of_match[] = { { .compatible = "renesas,sdhi-shmobile" }, { .compatible = "renesas,sdhi-sh7372" }, @@ -59,7 +66,7 @@ static const struct of_device_id sh_mobile_sdhi_of_match[] = { { .compatible = "renesas,sdhi-r8a7740", .data = &sh_mobile_sdhi_of_cfg[0], }, { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, }, { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, }, - { .compatible = "renesas,sdhi-r8a7790", .data = &sh_mobile_sdhi_of_cfg[0], }, + { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, }, {}, }; MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match); @@ -219,6 +226,7 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev) const struct sh_mobile_sdhi_of_data *of_data = of_id->data; mmc_data->flags |= of_data->tmio_flags; mmc_data->capabilities |= of_data->capabilities; + mmc_data->capabilities2 |= of_data->capabilities2; } /* SD control register space size is 0x100, 0x200 for bus_shift=1 */