From patchwork Wed Aug 6 01:24:51 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 4682881 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D83F39F39D for ; Wed, 6 Aug 2014 01:25:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F23BF20170 for ; Wed, 6 Aug 2014 01:25:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E4065201DE for ; Wed, 6 Aug 2014 01:25:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755123AbaHFBYx (ORCPT ); Tue, 5 Aug 2014 21:24:53 -0400 Received: from mail-pa0-f48.google.com ([209.85.220.48]:53524 "EHLO mail-pa0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753584AbaHFBYw (ORCPT ); Tue, 5 Aug 2014 21:24:52 -0400 Received: by mail-pa0-f48.google.com with SMTP id et14so2411784pad.7 for ; Tue, 05 Aug 2014 18:24:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:message-id:from:subject:user-agent:mime-version:to:cc :in-reply-to:references:content-type; bh=FzA7bdz6i9gYXcj/Hu2PI6ELPoqpGxejxxArB9V9/4s=; b=AMMEhH9rYhXmLurSFPG8qGtiRXKA/9uoK9R1ZyUuux3hn87UY28CeVWRx/vmHJMegu +8hiricjXBgqlv7mlHpgnUmfAehqGrN/VVop/tc1XJ1ZwMqlE37XWavdqPqw3A/zVSF/ DlTIawVwMob86oGJjSkbFI6JztsulTsHmvLxNeA3NjEBvIStccz/JFfhjio+Kqb1ZgH8 GXMskKS9tTwFa+97OJWbVefc8i3yDGGBQRGOELogA3TWICf0GoycCjnME8tzDFLUKKK4 pOSi4YkcYEXXydTzJ+G2mE0qTRs76hwOQZGZ37NPlDpKIE0Zb//GtimZHKphEpX7AJ/c hhWQ== X-Received: by 10.70.140.13 with SMTP id rc13mr8047776pdb.127.1407288291677; Tue, 05 Aug 2014 18:24:51 -0700 (PDT) Received: from remon.gmail.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id ue3sm3322514pbc.49.2014.08.05.18.24.50 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 05 Aug 2014 18:24:51 -0700 (PDT) Date: Tue, 05 Aug 2014 18:24:51 -0700 (PDT) Message-ID: <87y4v2jtpb.wl%kuninori.morimoto.gx@gmail.com> From: Kuninori Morimoto Subject: [PATCH 3/3 v2] ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCR User-Agent: Wanderlust/2.14.0 Emacs/23.3 Mule/6.0 MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") To: Simon , Mike Turquette Cc: Laurent , Magnus , Linux-SH , Geert Uytterhoeven , Kuninori Morimoto In-Reply-To: <874mxql8eh.wl%kuninori.morimoto.gx@gmail.com> References: <87ppgf1kgv.wl%kuninori.morimoto.gx@gmail.com> <874mxql8eh.wl%kuninori.morimoto.gx@gmail.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kuninori Morimoto 4bfb358b1d6cdeff8c6a13677f01ed78e9696b98 (ARM: shmobile: Add r8a7791 legacy SDHI clocks) added r8a7791 SDHI clock support. But, it is missing "0x0100: x 1/8" division ratio. This patch fixes hidden bug. It is based on R-Car H2 v0.7, R-Car M2 v0.9. Reported-by: Yusuke Goda Signed-off-by: Kuninori Morimoto --- arch/arm/mach-shmobile/clock-r8a7791.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c index 10e193d..453b231 100644 --- a/arch/arm/mach-shmobile/clock-r8a7791.c +++ b/arch/arm/mach-shmobile/clock-r8a7791.c @@ -152,7 +152,7 @@ enum { static struct clk div4_clks[DIV4_NR] = { [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT), - [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT), + [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1df0, CLK_ENABLE_ON_INIT), }; /* DIV6 clocks */