From patchwork Thu Dec 10 17:35:07 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 66318 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id nBAHZsij025452 for ; Thu, 10 Dec 2009 17:35:54 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1761308AbZLJReo (ORCPT ); Thu, 10 Dec 2009 12:34:44 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1761292AbZLJReo (ORCPT ); Thu, 10 Dec 2009 12:34:44 -0500 Received: from mail.gmx.net ([213.165.64.20]:52202 "HELO mail.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1761319AbZLJRel (ORCPT ); Thu, 10 Dec 2009 12:34:41 -0500 Received: (qmail invoked by alias); 10 Dec 2009 17:34:46 -0000 Received: from p57BD188C.dip0.t-ipconnect.de (EHLO axis700.grange) [87.189.24.140] by mail.gmx.net (mp057) with SMTP; 10 Dec 2009 18:34:46 +0100 X-Authenticated: #20450766 X-Provags-ID: V01U2FsdGVkX1/9/EB+DZv9LHnmFyigDF1Zq9hVsmMESrIewqJZ7G GZj1awKdB37plN Received: from lyakh (helo=localhost) by axis700.grange with local-esmtp (Exim 4.63) (envelope-from ) id 1NImux-0004U4-4i; Thu, 10 Dec 2009 18:35:07 +0100 Date: Thu, 10 Dec 2009 18:35:07 +0100 (CET) From: Guennadi Liakhovetski To: linux-kernel@vger.kernel.org cc: Dan Williams , linux-sh@vger.kernel.org Subject: [PATCH 1/3 v2] sh: stylistic improvements for the DMA driver In-Reply-To: Message-ID: References: MIME-Version: 1.0 X-Y-GMX-Trusted: 0 X-FuHaFi: 0.43 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c index f5fae12..8d9acd7 100644 --- a/drivers/dma/shdma.c +++ b/drivers/dma/shdma.c @@ -80,17 +80,17 @@ static int sh_dmae_rst(int id) unsigned short dmaor; sh_dmae_ctl_stop(id); - dmaor = (dmaor_read_reg(id)|DMAOR_INIT); + dmaor = dmaor_read_reg(id) | DMAOR_INIT; dmaor_write_reg(id, dmaor); - if ((dmaor_read_reg(id) & (DMAOR_AE | DMAOR_NMIF))) { + if (dmaor_read_reg(id) & (DMAOR_AE | DMAOR_NMIF)) { pr_warning(KERN_ERR "dma-sh: Can't initialize DMAOR.\n"); return -EINVAL; } return 0; } -static int dmae_is_idle(struct sh_dmae_chan *sh_chan) +static int dmae_is_busy(struct sh_dmae_chan *sh_chan) { u32 chcr = sh_dmae_readl(sh_chan, CHCR); if (chcr & CHCR_DE) { @@ -110,15 +110,14 @@ static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs hw) { sh_dmae_writel(sh_chan, hw.sar, SAR); sh_dmae_writel(sh_chan, hw.dar, DAR); - sh_dmae_writel(sh_chan, - (hw.tcr >> calc_xmit_shift(sh_chan)), TCR); + sh_dmae_writel(sh_chan, hw.tcr >> calc_xmit_shift(sh_chan), TCR); } static void dmae_start(struct sh_dmae_chan *sh_chan) { u32 chcr = sh_dmae_readl(sh_chan, CHCR); - chcr |= (CHCR_DE|CHCR_IE); + chcr |= CHCR_DE | CHCR_IE; sh_dmae_writel(sh_chan, chcr, CHCR); } @@ -132,7 +131,7 @@ static void dmae_halt(struct sh_dmae_chan *sh_chan) static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val) { - int ret = dmae_is_idle(sh_chan); + int ret = dmae_is_busy(sh_chan); /* When DMA was working, can not set data to CHCR */ if (ret) return ret; @@ -149,7 +148,7 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val) { u32 addr; int shift = 0; - int ret = dmae_is_idle(sh_chan); + int ret = dmae_is_busy(sh_chan); if (ret) return ret; @@ -307,7 +306,7 @@ static struct dma_async_tx_descriptor *sh_dmae_prep_memcpy( new = sh_dmae_get_desc(sh_chan); if (!new) { dev_err(sh_chan->dev, - "No free memory for link descriptor\n"); + "No free memory for link descriptor\n"); goto err_get_desc; } @@ -388,7 +387,7 @@ static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan) struct sh_dmae_regs hw; /* DMA work check */ - if (dmae_is_idle(sh_chan)) + if (dmae_is_busy(sh_chan)) return; /* Find the first un-transfer desciptor */ @@ -497,8 +496,9 @@ static void dmae_do_tasklet(unsigned long data) struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data; struct sh_desc *desc, *_desc, *cur_desc = NULL; u32 sar_buf = sh_dmae_readl(sh_chan, SAR); + list_for_each_entry_safe(desc, _desc, - &sh_chan->ld_queue, node) { + &sh_chan->ld_queue, node) { if ((desc->hw.sar + desc->hw.tcr) == sar_buf) { cur_desc = desc; break; @@ -543,8 +543,8 @@ static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id) /* alloc channel */ new_sh_chan = kzalloc(sizeof(struct sh_dmae_chan), GFP_KERNEL); if (!new_sh_chan) { - dev_err(shdev->common.dev, "No free memory for allocating " - "dma channels!\n"); + dev_err(shdev->common.dev, + "No free memory for allocating dma channels!\n"); return -ENOMEM; } @@ -586,8 +586,8 @@ static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id) "sh-dmae%d", new_sh_chan->id); /* set up channel irq */ - err = request_irq(irq, &sh_dmae_interrupt, - irqflags, new_sh_chan->dev_id, new_sh_chan); + err = request_irq(irq, &sh_dmae_interrupt, irqflags, + new_sh_chan->dev_id, new_sh_chan); if (err) { dev_err(shdev->common.dev, "DMA channel %d request_irq error " "with return %d\n", id, err); @@ -691,8 +691,8 @@ static int __init sh_dmae_probe(struct platform_device *pdev) } for (ecnt = 0 ; ecnt < ARRAY_SIZE(eirq); ecnt++) { - err = request_irq(eirq[ecnt], sh_dmae_err, - irqflags, "DMAC Address Error", shdev); + err = request_irq(eirq[ecnt], sh_dmae_err, irqflags, + "DMAC Address Error", shdev); if (err) { dev_err(&pdev->dev, "DMA device request_irq" "error (irq %d) with return %d\n", diff --git a/drivers/dma/shdma.h b/drivers/dma/shdma.h index 2b4bc15..60b81e5 100644 --- a/drivers/dma/shdma.h +++ b/drivers/dma/shdma.h @@ -35,15 +35,15 @@ struct sh_desc { struct sh_dmae_chan { dma_cookie_t completed_cookie; /* The maximum cookie completed */ - spinlock_t desc_lock; /* Descriptor operation lock */ - struct list_head ld_queue; /* Link descriptors queue */ - struct list_head ld_free; /* Link descriptors free */ - struct dma_chan common; /* DMA common channel */ - struct device *dev; /* Channel device */ + spinlock_t desc_lock; /* Descriptor operation lock */ + struct list_head ld_queue; /* Link descriptors queue */ + struct list_head ld_free; /* Link descriptors free */ + struct dma_chan common; /* DMA common channel */ + struct device *dev; /* Channel device */ struct tasklet_struct tasklet; /* Tasklet */ - int descs_allocated; /* desc count */ + int descs_allocated; /* desc count */ int id; /* Raw id of this channel */ - char dev_id[16]; /* unique name per DMAC of channel */ + char dev_id[16]; /* unique name per DMAC of channel */ /* Set chcr */ int (*set_chcr)(struct sh_dmae_chan *sh_chan, u32 regs);