From patchwork Thu Feb 18 15:24:17 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 80318 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o1IFOkTC025918 for ; Thu, 18 Feb 2010 15:24:46 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758374Ab0BRPYY (ORCPT ); Thu, 18 Feb 2010 10:24:24 -0500 Received: from mail.gmx.net ([213.165.64.20]:33759 "HELO mail.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1758354Ab0BRPYN (ORCPT ); Thu, 18 Feb 2010 10:24:13 -0500 Received: (qmail invoked by alias); 18 Feb 2010 15:24:07 -0000 Received: from p57BD1CB5.dip0.t-ipconnect.de (EHLO axis700.grange) [87.189.28.181] by mail.gmx.net (mp004) with SMTP; 18 Feb 2010 16:24:07 +0100 X-Authenticated: #20450766 X-Provags-ID: V01U2FsdGVkX1+jtitBos2jTihlOeKBHqfTCVJpGmmgEPk9sa1Au5 O8jM6ofNlIqgnM Received: from lyakh (helo=localhost) by axis700.grange with local-esmtp (Exim 4.63) (envelope-from ) id 1Ni8Ej-00026G-D4 for linux-sh@vger.kernel.org; Thu, 18 Feb 2010 16:24:17 +0100 Date: Thu, 18 Feb 2010 16:24:17 +0100 (CET) From: Guennadi Liakhovetski To: "linux-sh@vger.kernel.org" Subject: [PATCH] sh: merge sh7722 and sh7724 DMA register definitions Message-ID: MIME-Version: 1.0 X-Y-GMX-Trusted: 0 X-FuHaFi: 0.53000000000000003 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 18 Feb 2010 15:24:46 +0000 (UTC) diff --git a/arch/sh/include/cpu-sh4/cpu/dma-register.h b/arch/sh/include/cpu-sh4/cpu/dma-register.h index 008e7fc..55f9fec 100644 --- a/arch/sh/include/cpu-sh4/cpu/dma-register.h +++ b/arch/sh/include/cpu-sh4/cpu/dma-register.h @@ -22,7 +22,8 @@ #define CHCR_TS_LOW_SHIFT 3 #define CHCR_TS_HIGH_MASK 0 #define CHCR_TS_HIGH_SHIFT 0 -#elif defined(CONFIG_CPU_SUBTYPE_SH7722) +#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \ + defined(CONFIG_CPU_SUBTYPE_SH7724) #define CHCR_TS_LOW_MASK 0x00000018 #define CHCR_TS_LOW_SHIFT 3 #define CHCR_TS_HIGH_MASK 0x00300000 @@ -38,11 +39,6 @@ #define CHCR_TS_LOW_SHIFT 3 #define CHCR_TS_HIGH_MASK 0 #define CHCR_TS_HIGH_SHIFT 0 -#elif defined(CONFIG_CPU_SUBTYPE_SH7724) -#define CHCR_TS_LOW_MASK 0x00000018 -#define CHCR_TS_LOW_SHIFT 3 -#define CHCR_TS_HIGH_MASK 0x00600000 -#define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */ #elif defined(CONFIG_CPU_SUBTYPE_SH7780) #define CHCR_TS_LOW_MASK 0x00000018 #define CHCR_TS_LOW_SHIFT 3