From patchwork Wed Dec 12 14:52:20 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 1867521 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 786A5DF215 for ; Wed, 12 Dec 2012 14:53:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754552Ab2LLOxA (ORCPT ); Wed, 12 Dec 2012 09:53:00 -0500 Received: from moutng.kundenserver.de ([212.227.17.8]:65020 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754542Ab2LLOw7 (ORCPT ); Wed, 12 Dec 2012 09:52:59 -0500 Received: from axis700.grange (dslb-146-060-250-080.pools.arcor-ip.net [146.60.250.80]) by mrelayeu.kundenserver.de (node=mrbap4) with ESMTP (Nemesis) id 0MNtql-1TlnXo0rcJ-007QY8; Wed, 12 Dec 2012 15:52:53 +0100 Received: by axis700.grange (Postfix, from userid 1000) id 842A540B99; Wed, 12 Dec 2012 15:52:20 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by axis700.grange (Postfix) with ESMTP id 8187B40B98; Wed, 12 Dec 2012 15:52:20 +0100 (CET) Date: Wed, 12 Dec 2012 15:52:20 +0100 (CET) From: Guennadi Liakhovetski X-X-Sender: lyakh@axis700.grange To: linux-sh@vger.kernel.org cc: Paul Mundt , Magnus Damm Subject: [PATCH] sh: enable DMA for MMCIF on ecovec Message-ID: MIME-Version: 1.0 X-Provags-ID: V02:K0:khZBRNVjthuWHAIRm6cyJ+midP4G2bmHklFvEzijYlG 5Od9vWfGCaBFJTY4PL5xc5JU5tabLn2Ih8/WXPxKpgzzfFr9hj oYl2bmDjchDPcxzutACy573oU7d5FH2QJDOCwrKiYTICYa3a/7 +TmXGmOYaLGgfbnhCGs7Z04h9tCLzpodeuGUAQkJ3pRxYyeYDu caRY/tqBJA42zsXOxvoCrFlMeqVcUGX2/hfTc7NbayjbpaTLd1 m4bCcIDjpW5BMHC4WrizXSqjHqiaXsZ4dDPcbpToGcGgF85q3p 5wp4Op9InvxDmzhWyAsvtj4s5EgMgbRIKB+Omp9DHtJapvvCJE i1E5T1TZJ+gbq5y4UcAImTsqM40ZifIdFwzQM+i12ZxTZPby76 CSVdAfJCbQRRA== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org MMCIF on SH7724 can use DMA for I/O. Enable it on ecovec. Signed-off-by: Guennadi Liakhovetski --- arch/sh/boards/mach-ecovec24/setup.c | 3 +++ arch/sh/include/cpu-sh4/cpu/sh7724.h | 2 ++ arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 10 ++++++++++ 3 files changed, 15 insertions(+), 0 deletions(-) diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index 64559e8a..57c30e8 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c @@ -1031,12 +1031,15 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = { MMC_CAP_8_BIT_DATA | MMC_CAP_NEEDS_POLL, .ocr = MMC_VDD_32_33 | MMC_VDD_33_34, + .slave_id_tx = SHDMA_SLAVE_MMCIF_TX, + .slave_id_rx = SHDMA_SLAVE_MMCIF_RX, }; static struct platform_device sh_mmcif_device = { .name = "sh_mmcif", .id = 0, .dev = { + .coherent_dma_mask = 0xffffffff, .platform_data = &sh_mmcif_plat, }, .num_resources = ARRAY_SIZE(sh_mmcif_resources), diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h index 38859f9..2e38361 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7724.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h @@ -309,6 +309,8 @@ enum { SHDMA_SLAVE_SDHI0_RX, SHDMA_SLAVE_SDHI1_TX, SHDMA_SLAVE_SDHI1_RX, + SHDMA_SLAVE_MMCIF_TX, + SHDMA_SLAVE_MMCIF_RX, }; extern struct clk sh7724_fsimcka_clk; diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index 26b74c2..011c3c5 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c @@ -153,6 +153,16 @@ static const struct sh_dmae_slave_config sh7724_dmae_slaves[] = { .addr = 0x04cf0030, .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), .mid_rid = 0xca, + }, { + .slave_id = SHDMA_SLAVE_MMCIF_TX, + .addr = 0xa4ca0034, + .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0xcd, + }, { + .slave_id = SHDMA_SLAVE_MMCIF_RX, + .addr = 0xa4ca0034, + .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0xce, }, };