From patchwork Fri Apr 5 09:33:42 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2397341 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 04D62DF2E5 for ; Fri, 5 Apr 2013 09:34:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1765390Ab3DEJd7 (ORCPT ); Fri, 5 Apr 2013 05:33:59 -0400 Received: from moutng.kundenserver.de ([212.227.17.8]:64860 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752360Ab3DEJd6 (ORCPT ); Fri, 5 Apr 2013 05:33:58 -0400 Received: from axis700.grange (dslb-094-221-122-203.pools.arcor-ip.net [94.221.122.203]) by mrelayeu.kundenserver.de (node=mrbap4) with ESMTP (Nemesis) id 0Letzz-1UxwfB3TMF-00qNun; Fri, 05 Apr 2013 11:33:43 +0200 Received: by axis700.grange (Postfix, from userid 1000) id 67DB140BB4; Fri, 5 Apr 2013 11:33:42 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by axis700.grange (Postfix) with ESMTP id 5CE7C40BB3; Fri, 5 Apr 2013 11:33:42 +0200 (CEST) Date: Fri, 5 Apr 2013 11:33:42 +0200 (CEST) From: Guennadi Liakhovetski X-X-Sender: lyakh@axis700.grange To: Simon Horman cc: linux-sh@vger.kernel.org, Magnus Damm , devicetree-discuss@lists.ozlabs.org, Thomas Gleixner , linux-arm-kernel@lists.infradead.org Subject: [PATCH v2] irqchip: renesas-intc-irqpin: DT binding for sense bitfield width Message-ID: MIME-Version: 1.0 X-Provags-ID: V02:K0:kmtQGvRdrl/r9AFwpymEptkrGuYn+pJOxjITAHkExaU 9IHnElud2wW6X9w9ktGch2IksG7Sb0G76JjnBHXzafqRCirJQg jWtptIxma04NRnj7ItwvS1dqqMySELA58iwvlBVjBgVJlSuyk0 hOjS9YtPWKnRAJFztjPdsZOWUjPyA1wGHd8eAkmIiRrBdo8KxG a7MdFaXQulBzQZDGUFH96M/oQd/TlNG+6DyCO89XE8o3VhdgN6 MZJEXhdMkK/MiDdWtQurTj/jszG8bMIxh6K/3BkyH1Ptg4e/bu YaSWKbrnvwP4VDDEi14FKZNc5K24NY0iG4isUVkduhM65xGkT8 MuzMlcf+yuxFy+0MKUuPLi/dMAHPDozpRgWfYXeyjXx+ZTpLUc ZuFmX2X9ijRJg== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org Most Renesas irqpin controllers have 4-bit sense fields, however, some have different widths. This patch adds a DT binding to optionally specify such non-standard values. Signed-off-by: Guennadi Liakhovetski --- v2: is no longer based on an earlier "ARM: shmobile: irqpin: fix handling of spurious interrupts in DT case" patch, which needs more work. .../interrupt-controller/renesas,intc-irqpin.txt | 13 +++++++++++++ drivers/irqchip/irq-renesas-intc-irqpin.c | 5 +++++ 2 files changed, 18 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt new file mode 100644 index 0000000..c6f09b7 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt @@ -0,0 +1,13 @@ +DT bindings for the R-/SH-Mobile irqpin controller + +Required properties: + +- compatible: has to be "renesas,intc-irqpin" +- #interrupt-cells: has to be <2> + +Optional properties: + +- any properties, listed in interrupts.txt in this directory, and any standard + resource allocation properties +- sense-bitfield-width: width of a single sense bitfield in the SENSE register, + if different from the default 4 bits diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c index 5a68e5a..7a02dfe 100644 --- a/drivers/irqchip/irq-renesas-intc-irqpin.c +++ b/drivers/irqchip/irq-renesas-intc-irqpin.c @@ -18,6 +18,7 @@ */ #include +#include #include #include #include @@ -429,6 +430,10 @@ static int intc_irqpin_probe(struct platform_device *pdev) } } + if (!pdata) + of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width", + &p->config.sense_bitfield_width); + /* use more severe masking method if requested */ if (p->config.control_parent) { enable_fn = intc_irqpin_irq_enable_force;