From patchwork Mon Apr 8 08:08:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2405331 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 481B83FD1A for ; Mon, 8 Apr 2013 08:08:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934068Ab3DHIIy (ORCPT ); Mon, 8 Apr 2013 04:08:54 -0400 Received: from moutng.kundenserver.de ([212.227.126.171]:62907 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933171Ab3DHIIx (ORCPT ); Mon, 8 Apr 2013 04:08:53 -0400 Received: from axis700.grange (dslb-088-077-162-116.pools.arcor-ip.net [88.77.162.116]) by mrelayeu.kundenserver.de (node=mreu3) with ESMTP (Nemesis) id 0MFE4N-1UMZlq1cZn-00GGKj; Mon, 08 Apr 2013 10:08:41 +0200 Received: by axis700.grange (Postfix, from userid 1000) id 0210940BB4; Mon, 8 Apr 2013 10:08:40 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by axis700.grange (Postfix) with ESMTP id F37D540BB3; Mon, 8 Apr 2013 10:08:40 +0200 (CEST) Date: Mon, 8 Apr 2013 10:08:40 +0200 (CEST) From: Guennadi Liakhovetski X-X-Sender: lyakh@axis700.grange To: Magnus Damm cc: Simon Horman , SH-Linux , devicetree-discuss@lists.ozlabs.org, Thomas Gleixner , linux-arm-kernel@lists.infradead.org Subject: [PATCH v3] irqchip: renesas-intc-irqpin: DT binding for sense bitfield width Message-ID: MIME-Version: 1.0 X-Provags-ID: V02:K0:4o9dWQGKMrjOnfQ3df1JWeGFM1BOfp8NoCSMOiGhqpz H0/G2iVNH9PTYEqnU8yOU1hY+wgnNBf0dv5FaHHCYae9LNq1ZH skYACVJeivwD8jocC6WdYpU1EzzvNC+/Otr4o6pebFvQreREXu +IYYSFaJY/YgrK+OCFxV9xhXDKupZeTOavY/Pz/5D9GuBf++Q3 5XF2kcS7QSaqxrhhKCoDO4t5iNeeonCE8PrgsjdmOIMJav+k5G TvR29f8qV7dha7FQviaIIdT1LKTc1QZWMdM+xbWsYe8NqJhSaZ zgz3VrgRDK5W+jpcFJWt58afNa47vIZwGA//4scrabi5K/pa7c BwCaBKlL3ttNcHlz1CuZCMws04eew7ZZvA+Bshqn3zdPYLWCxR Rr3/8AK/qJcSA== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org Most Renesas irqpin controllers have 4-bit sense fields, however, some have different widths. This patch adds a DT binding to optionally specify such non-standard values. Signed-off-by: Guennadi Liakhovetski Acked-by: Magnus Damm --- v3: move the code to a common location, where device configuration parameters are retrieved .../interrupt-controller/renesas,intc-irqpin.txt | 13 +++++++++++++ drivers/irqchip/irq-renesas-intc-irqpin.c | 4 ++++ 2 files changed, 17 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt new file mode 100644 index 0000000..c6f09b7 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt @@ -0,0 +1,13 @@ +DT bindings for the R-/SH-Mobile irqpin controller + +Required properties: + +- compatible: has to be "renesas,intc-irqpin" +- #interrupt-cells: has to be <2> + +Optional properties: + +- any properties, listed in interrupts.txt in this directory, and any standard + resource allocation properties +- sense-bitfield-width: width of a single sense bitfield in the SENSE register, + if different from the default 4 bits diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c index 5a68e5a..4aca1b2 100644 --- a/drivers/irqchip/irq-renesas-intc-irqpin.c +++ b/drivers/irqchip/irq-renesas-intc-irqpin.c @@ -18,6 +18,7 @@ */ #include +#include #include #include #include @@ -349,6 +350,9 @@ static int intc_irqpin_probe(struct platform_device *pdev) /* deal with driver instance configuration */ if (pdata) memcpy(&p->config, pdata, sizeof(*pdata)); + else + of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width", + &p->config.sense_bitfield_width); if (!p->config.sense_bitfield_width) p->config.sense_bitfield_width = 4; /* default to 4 bits */