From patchwork Fri May 17 12:26:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2582541 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 741CADF215 for ; Fri, 17 May 2013 12:27:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755803Ab3EQM1Z (ORCPT ); Fri, 17 May 2013 08:27:25 -0400 Received: from moutng.kundenserver.de ([212.227.126.171]:51483 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755492Ab3EQM1Y (ORCPT ); Fri, 17 May 2013 08:27:24 -0400 Received: from axis700.grange (dslb-088-076-018-110.pools.arcor-ip.net [88.76.18.110]) by mrelayeu.kundenserver.de (node=mreu0) with ESMTP (Nemesis) id 0MTc9s-1V3kb30Jfc-00QZun; Fri, 17 May 2013 14:26:49 +0200 Received: by axis700.grange (Postfix, from userid 1000) id B940440BB4; Fri, 17 May 2013 14:26:48 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by axis700.grange (Postfix) with ESMTP id B64B040BB3; Fri, 17 May 2013 14:26:48 +0200 (CEST) Date: Fri, 17 May 2013 14:26:48 +0200 (CEST) From: Guennadi Liakhovetski X-X-Sender: lyakh@axis700.grange To: Laurent Pinchart cc: linux-sh@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, Linus Walleij , Magnus Damm Subject: Re: [PATCH v3 09/20] ARM: shmobile: r8a7790: Add GPIO controller devices to device tree In-Reply-To: <1368577100-3530-10-git-send-email-laurent.pinchart+renesas@ideasonboard.com> Message-ID: References: <1368577100-3530-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com> <1368577100-3530-10-git-send-email-laurent.pinchart+renesas@ideasonboard.com> MIME-Version: 1.0 X-Provags-ID: V02:K0:w9pMiHjb0FwobGK05b8ulHwI8X3KzAAmPNoi8QHtD3j aXw8yQknfiymrIMRRQGEa6Ra7t4ncVa5XdkRe+f5gX4vENCVMB SV6L3e8n6DneOM5lS+QWpMGiuHd+QKwz+R+TMSNxBTzMZHXxSa 9WCVGDE+ab+KCiAWpE40b7IlBvHqnWY1Pzgaonklcx+iNnoCzx EfBYqjkFuXnYW1ZTuk2m1n5x/vFHMna3DxcCXik0/BevPVI3Im xUH8RuV8G6GFQwC0pJJEWK4+co1Wc7uOck/1nxzGc7htj1Kvfk +YRUYyjmeCNtnMoOzJ9+Ny08vN7Jeuxo3vDyI5+iPy2G1bPAQH xM2Yzsufzv+bXllXxVMdiYciGZOjtX7Xyuh2fHvE/9GPhPwlUS gsf5B0BL9Fv5A== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org Hi Laurent On Wed, 15 May 2013, Laurent Pinchart wrote: > Add GPIO controller nodes to the r8a7790 core device tree. > > Signed-off-by: Laurent Pinchart > --- > arch/arm/boot/dts/r8a7790.dtsi | 54 ++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 54 insertions(+) Also here a couple of things are missing (presumably, for other SoCs you need the same): Thanks Guennadi --- Guennadi Liakhovetski, Ph.D. Freelance Open-Source Software Developer http://www.open-technology.de/ -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 674ee39..cd1a04f 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -51,6 +51,7 @@ interrupts = <0 4 0x4>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 0 32>; }; gpio1: gpio@ffc41000 { @@ -60,6 +61,7 @@ interrupts = <0 5 0x4>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 32 32>; }; gpio2: gpio@ffc42000 { @@ -69,6 +71,7 @@ interrupts = <0 6 0x4>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 64 32>; }; gpio3: gpio@ffc43000 { @@ -78,6 +81,7 @@ interrupts = <0 7 0x4>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 96 32>; }; gpio4: gpio@ffc44000 { @@ -87,6 +91,7 @@ interrupts = <0 8 0x4>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 128 32>; }; gpio5: gpio@ffc45000 { @@ -96,6 +101,7 @@ interrupts = <0 9 0x4>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 160 32>; }; timer { @@ -118,6 +124,7 @@ pfc: pfc@e6060000 { compatible = "renesas,pfc-r8a7790"; reg = <0 0xe6060000 0 0x250>; + #gpio-range-cells = <3>; }; /* No MMC_CAP_UHS_DDR50 (dual data rate) capability on r8a7790! */