From patchwork Wed Jun 26 14:05:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2784901 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E395D9F245 for ; Wed, 26 Jun 2013 14:06:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7C4FF20507 for ; Wed, 26 Jun 2013 14:06:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 85FBB20504 for ; Wed, 26 Jun 2013 14:05:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751461Ab3FZOF5 (ORCPT ); Wed, 26 Jun 2013 10:05:57 -0400 Received: from moutng.kundenserver.de ([212.227.126.186]:63714 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751396Ab3FZOF4 (ORCPT ); Wed, 26 Jun 2013 10:05:56 -0400 Received: from axis700.grange (dslb-178-001-151-028.pools.arcor-ip.net [178.1.151.28]) by mrelayeu.kundenserver.de (node=mrbap2) with ESMTP (Nemesis) id 0LpQRR-1UOGEp1Bxd-00euDm; Wed, 26 Jun 2013 16:05:54 +0200 Received: by axis700.grange (Postfix, from userid 1000) id E742340BB4; Wed, 26 Jun 2013 16:05:53 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by axis700.grange (Postfix) with ESMTP id DD80E40BB3; Wed, 26 Jun 2013 16:05:53 +0200 (CEST) Date: Wed, 26 Jun 2013 16:05:53 +0200 (CEST) From: Guennadi Liakhovetski X-X-Sender: lyakh@axis700.grange To: linux-sh@vger.kernel.org cc: Magnus Damm , Simon Horman Subject: [PATCH/RFC] ARM: shmobile: Lager: add MMCIF and SDHI support Message-ID: MIME-Version: 1.0 X-Provags-ID: V02:K0:m5jcZikM9B8II31LFEpI1Psv8/ZP+s+GyFqmg4duhW2 jNc6BJrO9sfgTLKk5u1Am8lTIEx2TMhoOCdhZ0UhiYDFJX+dtS +FW67yjyxxHQPaBQLzVyoTyqZMjFQZiDhQMCRM10gWRLCkn7jo Q5g97nsZnxiFmh7glxHvFkVIBIb45LKadu/fr4Ia7Mx60BGGSF /PIUgCKu2sztASYr3Eo0Gq/Ly/sD1TXmY8jPjeoJYOQCZxlOsJ w2BbxYD/F5LCqxk3B0rTHN1sB04GrgqkSkCLIvFPNzJxgG/3Hb pk/Y/mRP6mbdo91S4XQLDIxp95AljPDDisu9p1CV/0WN7lrbWn 5XwbVt9o83at2lnaL09jjuNb245YjTofk8SkFBcSAIL1Yli1i/ cMhY/GAaeJNAg== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds all SDHI and MMCIF DT nodes to r8a7790. On Lager only SDHI0, SDHI2 and MMCIF1 are available. For these interfaces DT nodes are enabled and pinmux settings are activated. Signed-off-by: Guennadi Liakhovetski --- RFC because it couldn't be tested properly due to hardware access restrictions. Similar comments as for APE6EVM apply: dummy regulator and no GPIO CD, pinmux in .c due to missing pinctrl DT support on r8a7790 arch/arm/boot/dts/r8a7790-lager.dts | 28 +++++++++++++++++ arch/arm/boot/dts/r8a7790.dtsi | 56 ++++++++++++++++++++++++++++++++++ arch/arm/mach-shmobile/board-lager.c | 23 ++++++++++++++ 3 files changed, 107 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 09a84fc..e6b2c17 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -28,4 +28,32 @@ #address-cells = <1>; #size-cells = <1>; }; + + reg_3p3v: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&mmcif1 { + vmmc-supply = <®_3p3v>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&sdhi0 { + vmmc-supply = <®_3p3v>; + bus-width = <4>; + status = "okay"; +}; + +&sdhi2 { + vmmc-supply = <®_3p3v>; + bus-width = <4>; + status = "okay"; }; diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 339d9b1..18d818f 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -54,4 +54,60 @@ interrupt-parent = <&gic>; interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>; }; + + /* No MMC_CAP_UHS_DDR50 (dual data rate) capability on r8a7790! */ + mmcif0: mmcif@ee200000 { + compatible = "renesas,sh-mmcif"; + reg = <0 0xee200000 0 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 169 0x4>; + reg-io-width = <4>; + status = "disabled"; + }; + + mmcif1: mmcif@ee220000 { + compatible = "renesas,sh-mmcif"; + reg = <0 0xee220000 0 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 170 0x4>; + reg-io-width = <4>; + status = "disabled"; + }; + + sdhi0: sdhi@ee100000 { + compatible = "renesas,r8a7740-sdhi"; + reg = <0 0xee100000 0 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 165 4>; + cap-sd-highspeed; + status = "disabled"; + }; + + sdhi1: sdhi@ee120000 { + compatible = "renesas,r8a7740-sdhi"; + reg = <0 0xee120000 0 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 166 4>; + cap-sd-highspeed; + status = "disabled"; + }; + + /* What are SDHI2 C2 and SDHI3 C2 controllers? */ + sdhi2: sdhi@ee140000 { + compatible = "renesas,r8a7740-sdhi"; + reg = <0 0xee140000 0 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 167 4>; + cap-sd-highspeed; + status = "disabled"; + }; + + sdhi3: sdhi@ee160000 { + compatible = "renesas,r8a7740-sdhi"; + reg = <0 0xee160000 0 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 168 4>; + cap-sd-highspeed; + status = "disabled"; + }; }; diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c index d73e21d..2e44479 100644 --- a/arch/arm/mach-shmobile/board-lager.c +++ b/arch/arm/mach-shmobile/board-lager.c @@ -78,6 +78,29 @@ static const struct pinctrl_map lager_pinctrl_map[] = { /* SCIF1 (CN20: DEBUG SERIAL1) */ PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790", "scif1_data", "scif1"), + /* SDHI0 */ + PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-r8a7790", + "sdhi0_data4", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-r8a7790", + "sdhi0_ctrl", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-r8a7790", + "sdhi0_wp", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-r8a7790", + "sdhi0_cd", "sdhi0"), + /* SDHI2 */ + PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-r8a7790", + "sdhi2_data4", "sdhi2"), + PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-r8a7790", + "sdhi2_ctrl", "sdhi2"), + PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-r8a7790", + "sdhi2_wp", "sdhi2"), + PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-r8a7790", + "sdhi2_cd", "sdhi2"), + /* MMCIF1 */ + PIN_MAP_MUX_GROUP_DEFAULT("ee220000.mmcif", "pfc-r8a7790", + "mmc1_data8", "mmc1"), + PIN_MAP_MUX_GROUP_DEFAULT("ee220000.mmcif", "pfc-r8a7790", + "mmc1_ctrl", "mmc1"), }; static void __init lager_add_standard_devices(void)