From patchwork Mon Sep 23 15:38:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2928971 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D98A0BFF05 for ; Mon, 23 Sep 2013 15:39:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9DD142038C for ; Mon, 23 Sep 2013 15:39:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 266BA20379 for ; Mon, 23 Sep 2013 15:39:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753303Ab3IWPjI (ORCPT ); Mon, 23 Sep 2013 11:39:08 -0400 Received: from moutng.kundenserver.de ([212.227.126.187]:49992 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753279Ab3IWPjC (ORCPT ); Mon, 23 Sep 2013 11:39:02 -0400 Received: from axis700.grange (dslb-084-061-108-099.pools.arcor-ip.net [84.61.108.99]) by mrelayeu.kundenserver.de (node=mreu3) with ESMTP (Nemesis) id 0MDr1W-1VfB8I0h6U-00H5bK; Mon, 23 Sep 2013 17:38:48 +0200 Received: by axis700.grange (Postfix, from userid 1000) id 9C1AE40BB4; Mon, 23 Sep 2013 17:38:47 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by axis700.grange (Postfix) with ESMTP id 9984040BB3; Mon, 23 Sep 2013 17:38:47 +0200 (CEST) Date: Mon, 23 Sep 2013 17:38:47 +0200 (CEST) From: Guennadi Liakhovetski X-X-Sender: lyakh@axis700.grange To: linux-sh@vger.kernel.org cc: devicetree-discuss@lists.ozlabs.org, Magnus Damm , Simon Horman , Laurent Pinchart Subject: [PATCH/RFC v4] ARM: shmobile: armadillo800eva-reference: add SDHI and MMCIF interfaces Message-ID: MIME-Version: 1.0 X-Provags-ID: V02:K0:wOXE8M3fHV+upxWohIq6iqlM2iRKkdZqH5UHIg97HhW YIzFhyuDRjyFeouFLYKZsWTkSznabFjeteeM4SpBeHGLwm5lKc qBOqFhDV+NzjwmSyw4I5rlQpSyjCtx4K5eaBhbn74gDjBWC7kj JwBqpcv8WINt+U+VpEcLdWw5YPgS/znzUXyjUkmolszNsIO2An b6y7k2sqapeWdx4x/gjz+RspyOvydcOl1nYaz7XpquLAc33gd2 rIbX4lnZeY0qDuAaE1TsnkJ4c34qBKUHN4EwrHFIS97p9LTmQJ Pt567xDs0x/jsUcUFoDITYCA5KXqHUseUKAI6QPruoh32H+Hfm 1ISRIpHoqWcRR5W52c1HQHtmTGtxXzzfHpDpzmjf4eL5RboPSP QFdMUstJhW+GA== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-9.2 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add SDHI0, SDHI1 and MMCIF interfaces to armadillo800eva-reference with regulators and pin configurations. Signed-off-by: Guennadi Liakhovetski --- v4: 1. now that PFC pinctrl is usable with DT, we can use proper regulators and pin configurations on armadillo800eva 2. corrected SDHI compatibility strings 3. RFC because I don't know how to enable choosing between CON14 and CON8. In .c version this is done by reading GPIO 6. To do the same in DT mode we'd probably have to use some run-time DT patching, which isn't possible yet, AFAICS. .../boot/dts/r8a7740-armadillo800eva-reference.dts | 83 ++++++++++++++++++++ arch/arm/boot/dts/r8a7740.dtsi | 33 ++++++++ 2 files changed, 116 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts index c638e4a..af15be0 100644 --- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts +++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts @@ -34,6 +34,44 @@ regulator-boot-on; }; + vcc_sdhi0: regulator@1 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&pfc 75 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_sdhi1: regulator@2 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI1 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&pfc 16 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator@3 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_sdhi0>; + + enable-gpio = <&pfc 74 GPIO_ACTIVE_HIGH>; + gpios = <&pfc 17 GPIO_ACTIVE_HIGH>; + states = <3300000 0 + 1800000 1>; + + enable-active-high; + }; + leds { compatible = "gpio-leds"; led1 { @@ -76,4 +114,49 @@ renesas,groups = "intc_irq10"; renesas,function = "intc"; }; + + mmc0_pins: mmc0 { + renesas,groups = "mmc0_data8_1", "mmc0_ctrl_1"; + renesas,function = "mmc0"; + }; + + sdhi0_pins: sdhi0 { + renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp"; + renesas,function = "sdhi0"; + }; + + sdhi1_pins: sdhi1 { + renesas,groups = "sdhi1_data4", "sdhi1_ctrl", "sdhi1_cd", "sdhi1_wp"; + renesas,function = "sdhi1"; + }; +}; + +&mmcif0 { + pinctrl-0 = <&mmc0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <®_3p3v>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + bus-width = <4>; + broken-cd; + status = "okay"; +}; + +&sdhi1 { + pinctrl-0 = <&sdhi1_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi1>; + bus-width = <4>; + status = "okay"; }; diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 44d3d52..018c02d 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -159,4 +159,37 @@ status = "disabled"; #pwm-cells = <3>; }; + + mmcif0: mmcif@e6bd0000 { + compatible = "renesas,sh-mmcif"; + reg = <0xe6bd0000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 56 4 + 0 57 4>; + status = "disabled"; + }; + + sdhi0: sdhi@e6850000 { + compatible = "renesas,sdhi-r8a7740"; + reg = <0xe6850000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 117 4 + 0 118 4 + 0 119 4>; + cap-sd-highspeed; + cap-sdio-irq; + status = "disabled"; + }; + + sdhi1: sdhi@e6860000 { + compatible = "renesas,sdhi-r8a7740"; + reg = <0xe6860000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 121 4 + 0 122 4 + 0 123 4>; + cap-sd-highspeed; + cap-sdio-irq; + status = "disabled"; + }; };