From patchwork Mon Jun 15 06:50:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 11603917 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9356013A0 for ; Mon, 15 Jun 2020 06:51:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7BC2B20738 for ; Mon, 15 Jun 2020 06:51:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592203906; bh=1PqJ9rh9K8XCO0eaMwCCjEi5Eo11km5eJlUOgu+mkT0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=n2Govg3tWEwT+vOIfyPssRegwGCqnnhQermjn19OqQUL4ttoJMB1cKGrbOpAgNV9i mh//nR/6BHBHvzlfqWXVstQhKpzreomgoZjmE3FRMlQVQx2IpFN3qEHqVztK+/hk+u r8hdpJRYPWkQyL8/ys/gTVhn9es2VLsDXe7q5BbI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728484AbgFOGvq (ORCPT ); Mon, 15 Jun 2020 02:51:46 -0400 Received: from mail.kernel.org ([198.145.29.99]:36772 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728750AbgFOGuf (ORCPT ); Mon, 15 Jun 2020 02:50:35 -0400 Received: from mail.kernel.org (ip5f5ad5c5.dynamic.kabel-deutschland.de [95.90.213.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8201720C56; Mon, 15 Jun 2020 06:50:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592203832; bh=1PqJ9rh9K8XCO0eaMwCCjEi5Eo11km5eJlUOgu+mkT0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=1uvzPEmTKkxJTwdpYdiwb8OTMGZI63MOOG5aDvAwGlQxQU8Mqt3Nj9YhGQOwiVy1j MzYcbIveuaRVbZOcj6Ujq8E+y1nZqqz4SH+pB6ptjvySn0hRDkmhKFGlh/h8PUJdgi qZzXHTmLT+OGcF+ToJQgMTuL7GlZfzYdSjnWo0a0= Received: from mchehab by mail.kernel.org with local (Exim 4.93) (envelope-from ) id 1jkiww-009o6i-JE; Mon, 15 Jun 2020 08:50:30 +0200 From: Mauro Carvalho Chehab To: Linux Doc Mailing List Cc: Mauro Carvalho Chehab , linux-kernel@vger.kernel.org, Jonathan Corbet , Yoshinori Sato , Rich Felker , linux-sh@vger.kernel.org Subject: [PATCH 17/22] docs: sh: convert register-banks.txt to ReST Date: Mon, 15 Jun 2020 08:50:22 +0200 Message-Id: X-Mailer: git-send-email 2.26.2 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org - Add a SPDX header; - Adjust document title to follow ReST style; - Add blank lines to make ReST markup happy - Add it to sh/index.rst. Signed-off-by: Mauro Carvalho Chehab --- Documentation/sh/index.rst | 1 + .../sh/{register-banks.txt => register-banks.rst} | 13 ++++++++++--- arch/sh/Kconfig.cpu | 2 +- 3 files changed, 12 insertions(+), 4 deletions(-) rename Documentation/sh/{register-banks.txt => register-banks.rst} (88%) diff --git a/Documentation/sh/index.rst b/Documentation/sh/index.rst index 56c08790265d..580f3b17e841 100644 --- a/Documentation/sh/index.rst +++ b/Documentation/sh/index.rst @@ -8,6 +8,7 @@ SuperH Interfaces Guide :maxdepth: 1 new-machine + register-banks Memory Management ================= diff --git a/Documentation/sh/register-banks.txt b/Documentation/sh/register-banks.rst similarity index 88% rename from Documentation/sh/register-banks.txt rename to Documentation/sh/register-banks.rst index a6719f2f6594..2bef5c8fcbbc 100644 --- a/Documentation/sh/register-banks.txt +++ b/Documentation/sh/register-banks.rst @@ -1,5 +1,8 @@ - Notes on register bank usage in the kernel - ========================================== +.. SPDX-License-Identifier: GPL-2.0 + +========================================== +Notes on register bank usage in the kernel +========================================== Introduction ------------ @@ -23,11 +26,15 @@ Presently the kernel uses several of these registers. - r0_bank, r1_bank (referenced as k0 and k1, used for scratch registers when doing exception handling). + - r2_bank (used to track the EXPEVT/INTEVT code) + - Used by do_IRQ() and friends for doing irq mapping based off of the interrupt exception vector jump table offset + - r6_bank (global interrupt mask) + - The SR.IMASK interrupt handler makes use of this to set the interrupt priority level (used by local_irq_enable()) + - r7_bank (current) - diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu index 97ca35f2cd37..fff419f3d757 100644 --- a/arch/sh/Kconfig.cpu +++ b/arch/sh/Kconfig.cpu @@ -85,7 +85,7 @@ config CPU_HAS_SR_RB that are lacking this bit must have another method in place for accomplishing what is taken care of by the banked registers. - See for further + See for further information on SR.RB and register banking in the kernel in general. config CPU_HAS_PTEAEX