diff mbox

[v5,1/2] of: add J-Core timer bindings

Message ID afa8eaaebc9216e83e542e9bcad8fa1dd659d489.1469688975.git.dalias@libc.org (mailing list archive)
State New, archived
Headers show

Commit Message

Rich Felker May 17, 2016, 11:18 p.m. UTC
Signed-off-by: Rich Felker <dalias@libc.org>
---
 .../devicetree/bindings/timer/jcore,pit.txt        | 25 ++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/jcore,pit.txt

Comments

Rob Herring (Arm) July 29, 2016, 8:49 p.m. UTC | #1
On Tue, May 17, 2016 at 11:18:58PM +0000, Rich Felker wrote:
> Signed-off-by: Rich Felker <dalias@libc.org>
> ---
>  .../devicetree/bindings/timer/jcore,pit.txt        | 25 ++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/jcore,pit.txt

Acked-by: Rob Herring <robh@kernel.org>
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Rich Felker Aug. 2, 2016, 10:57 p.m. UTC | #2
On Tue, May 17, 2016 at 11:18:58PM +0000, Rich Felker wrote:
> Signed-off-by: Rich Felker <dalias@libc.org>
> ---
>  .../devicetree/bindings/timer/jcore,pit.txt        | 25 ++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/jcore,pit.txt
> 
> diff --git a/Documentation/devicetree/bindings/timer/jcore,pit.txt b/Documentation/devicetree/bindings/timer/jcore,pit.txt
> new file mode 100644
> index 0000000..0f42af4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/jcore,pit.txt
> @@ -0,0 +1,25 @@
> +J-Core Programmable Interval Timer and Clocksource
> +
> +Required properties:
> +
> +- compatible: Must be "jcore,pit".
> +
> +- reg: Memory region(s) for timer/clocksource registers. For SMP,
> +  there should be one region per cpu, indexed by the sequential,
> +  zero-based hardware cpu number (which is also the logical cpu
> +  number).

One detail I missed: Mark Rutland asked me to remove the corresponding
remark about logical cpu numbers from the AIC binding document, so I
think it should be removed here too for the same reason -- it's a
Linux implementation detail, not part of the hw binding.

Rich
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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/timer/jcore,pit.txt b/Documentation/devicetree/bindings/timer/jcore,pit.txt
new file mode 100644
index 0000000..0f42af4
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/jcore,pit.txt
@@ -0,0 +1,25 @@ 
+J-Core Programmable Interval Timer and Clocksource
+
+Required properties:
+
+- compatible: Must be "jcore,pit".
+
+- reg: Memory region(s) for timer/clocksource registers. For SMP,
+  there should be one region per cpu, indexed by the sequential,
+  zero-based hardware cpu number (which is also the logical cpu
+  number).
+
+- interrupts: An interrupt to assign for the timer. The actual pit
+  core is integrated with the aic and allows the timer interrupt
+  assignment to be programmed by software, but this property is
+  required in order to reserve an interrupt number that doesn't
+  conflict with other devices.
+
+
+Example:
+
+timer@200 {
+	compatible = "jcore,pit";
+	reg = < 0x200 0x30 0x500 0x30 >;
+	interrupts = < 0x48 >;
+};