diff mbox series

[v4] sh: avoid using IRQ0 on SH3/4

Message ID b2bccbca-6acf-7129-0099-7ad21bf13430@omp.ru (mailing list archive)
State New, archived
Headers show
Series [v4] sh: avoid using IRQ0 on SH3/4 | expand

Commit Message

Sergey Shtylyov May 3, 2022, 8:42 p.m. UTC
Using IRQ0 by the platform devices is going to be disallowed soon (see [1])
and even now, when IRQ0 is about to be returned by platfrom_get_irq(), you
see a big warning.  The code supporting SH3/4 SoCs maps the IRQ #s starting
at 0 -- modify that code to start the IRQ #s from 16 instead.

The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they
indeed use IRQ0 for the SMSC911x compatible Ethernet chip...

[1] https://lore.kernel.org/all/025679e1-1f0a-ae4b-4369-01164f691511@omp.ru/

Fixes: a85a6c86c25b ("driver core: platform: Clarify that IRQ 0 is invalid")
Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>

---
The patch is against Linus Torvalds' 'linux.git' repo.

Changes in version 4:
- fixed up the off-chip base IRQ #s for the Dreamcast/Highlander/R2D/SE7724
  boards.

Changes in version 3:
- added an appropriate Fixes: tag and added a passage about it to the patch
  description;
- added actual cases of the boards using IRQ0 to the patch description;
- added Geert Uytterhoeven's and John Paul Adrian Glaubitz's tags;
- updated the link to point to the version 2 of the patch.

Changes in version 2:
- changed cmp/ge to cmp/hs in the assembly code.

 arch/sh/include/mach-common/mach/highlander.h |    2 +-
 arch/sh/include/mach-common/mach/r2d.h        |    2 +-
 arch/sh/include/mach-dreamcast/mach/sysasic.h |    2 +-
 arch/sh/include/mach-se/mach/se7724.h         |    2 +-
 arch/sh/kernel/cpu/sh3/entry.S                |    4 ++--
 include/linux/sh_intc.h                       |    6 +++---
 6 files changed, 9 insertions(+), 9 deletions(-)

Comments

Sergey Shtylyov Jan. 13, 2023, 6:21 p.m. UTC | #1
Hello!

On 5/3/22 11:42 PM, Sergey Shtylyov wrote:

> Using IRQ0 by the platform devices is going to be disallowed soon (see [1])
> and even now, when IRQ0 is about to be returned by platfrom_get_irq(), you
> see a big warning.  The code supporting SH3/4 SoCs maps the IRQ #s starting
> at 0 -- modify that code to start the IRQ #s from 16 instead.
> 
> The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they
> indeed use IRQ0 for the SMSC911x compatible Ethernet chip...
> 
> [1] https://lore.kernel.org/all/025679e1-1f0a-ae4b-4369-01164f691511@omp.ru/
> 
> Fixes: a85a6c86c25b ("driver core: platform: Clarify that IRQ 0 is invalid")
> Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Tested-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
> 
> ---
> The patch is against Linus Torvalds' 'linux.git' repo.

   So, this patch hasn't been merged... may I ask why? :-(

MBR, Sergey
John Paul Adrian Glaubitz Jan. 13, 2023, 6:38 p.m. UTC | #2
Hi Sergey!

> On Jan 13, 2023, at 7:27 PM, Sergey Shtylyov <s.shtylyov@omp.ru> wrote:
> 
> Hello!
> 
>> On 5/3/22 11:42 PM, Sergey Shtylyov wrote:
>> 
>> Using IRQ0 by the platform devices is going to be disallowed soon (see [1])
>> and even now, when IRQ0 is about to be returned by platfrom_get_irq(), you
>> see a big warning.  The code supporting SH3/4 SoCs maps the IRQ #s starting
>> at 0 -- modify that code to start the IRQ #s from 16 instead.
>> 
>> The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they
>> indeed use IRQ0 for the SMSC911x compatible Ethernet chip...
>> 
>> [1] https://lore.kernel.org/all/025679e1-1f0a-ae4b-4369-01164f691511@omp.ru/
>> 
>> Fixes: a85a6c86c25b ("driver core: platform: Clarify that IRQ 0 is invalid")
>> Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> Tested-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
>> 
>> ---
>> The patch is against Linus Torvalds' 'linux.git' repo.
> 
>   So, this patch hasn't been merged... may I ask why? :-(

The SH maintainers have been MIA which is why the other maintainers want to kill the architecture again.

I’m seriously considering adopting the architecture.

Not sure whether Linus would grant that though.

Adrian
Geert Uytterhoeven Jan. 14, 2023, 12:06 p.m. UTC | #3
Hi Adrian,

On Fri, Jan 13, 2023 at 7:49 PM John Paul Adrian Glaubitz
<glaubitz@physik.fu-berlin.de> wrote:
> > On Jan 13, 2023, at 7:27 PM, Sergey Shtylyov <s.shtylyov@omp.ru> wrote:
> >> On 5/3/22 11:42 PM, Sergey Shtylyov wrote:
> >> Using IRQ0 by the platform devices is going to be disallowed soon (see [1])
> >> and even now, when IRQ0 is about to be returned by platfrom_get_irq(), you
> >> see a big warning.  The code supporting SH3/4 SoCs maps the IRQ #s starting
> >> at 0 -- modify that code to start the IRQ #s from 16 instead.
> >>
> >> The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they
> >> indeed use IRQ0 for the SMSC911x compatible Ethernet chip...
> >>
> >> [1] https://lore.kernel.org/all/025679e1-1f0a-ae4b-4369-01164f691511@omp.ru/
> >>
> >> Fixes: a85a6c86c25b ("driver core: platform: Clarify that IRQ 0 is invalid")
> >> Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
> >> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >> Tested-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
> >>
> >> ---
> >> The patch is against Linus Torvalds' 'linux.git' repo.
> >
> >   So, this patch hasn't been merged... may I ask why? :-(
>
> The SH maintainers have been MIA which is why the other maintainers want to kill the architecture again.
>
> I’m seriously considering adopting the architecture.
>
> Not sure whether Linus would grant that though.

Why not?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Rob Landley Jan. 14, 2023, 11:45 p.m. UTC | #4
On 1/13/23 12:38, John Paul Adrian Glaubitz wrote:
>>> The patch is against Linus Torvalds' 'linux.git' repo.
>> 
>>   So, this patch hasn't been merged... may I ask why? :-(
> 
> The SH maintainers have been MIA which is why the other maintainers want to kill the architecture again.

To clarify: Sato-san was only ever assisting Rich, as in promising to answer
questions when Rich didn't understand something. (That may not have been
represented in MAINTAINERS but that was what Sato-san agreed to when we all had
lunch together in tokyo however many years ago that was.)

> I’m seriously considering adopting the architecture.
> 
> Not sure whether Linus would grant that though.

I'll happily endorse you for maintainer if that would help.

Rob
John Paul Adrian Glaubitz Jan. 15, 2023, 12:13 a.m. UTC | #5
On 1/15/23 00:45, Rob Landley wrote:
>> I’m seriously considering adopting the architecture.
>>
>> Not sure whether Linus would grant that though.
> 
> I'll happily endorse you for maintainer if that would help.

Let me sleep over it for 1-2 days. I need to really make sure I understand the responsibility.

Adrian
diff mbox series

Patch

Index: linux/arch/sh/include/mach-common/mach/highlander.h
===================================================================
--- linux.orig/arch/sh/include/mach-common/mach/highlander.h
+++ linux/arch/sh/include/mach-common/mach/highlander.h
@@ -176,7 +176,7 @@ 
 #define IVDR_CK_ON	4		/* iVDR Clock ON */
 #endif
 
-#define HL_FPGA_IRQ_BASE	200
+#define HL_FPGA_IRQ_BASE	(200 + 16)
 #define HL_NR_IRL		15
 
 #define IRQ_AX88796		(HL_FPGA_IRQ_BASE + 0)
Index: linux/arch/sh/include/mach-common/mach/r2d.h
===================================================================
--- linux.orig/arch/sh/include/mach-common/mach/r2d.h
+++ linux/arch/sh/include/mach-common/mach/r2d.h
@@ -47,7 +47,7 @@ 
 
 #define IRLCNTR1	(PA_BCR + 0)	/* Interrupt Control Register1 */
 
-#define R2D_FPGA_IRQ_BASE	100
+#define R2D_FPGA_IRQ_BASE	(100 + 16)
 
 #define IRQ_VOYAGER		(R2D_FPGA_IRQ_BASE + 0)
 #define IRQ_EXT			(R2D_FPGA_IRQ_BASE + 1)
Index: linux/arch/sh/include/mach-dreamcast/mach/sysasic.h
===================================================================
--- linux.orig/arch/sh/include/mach-dreamcast/mach/sysasic.h
+++ linux/arch/sh/include/mach-dreamcast/mach/sysasic.h
@@ -22,7 +22,7 @@ 
    takes.
 */
 
-#define HW_EVENT_IRQ_BASE  48
+#define HW_EVENT_IRQ_BASE  (48 + 16)
 
 /* IRQ 13 */
 #define HW_EVENT_VSYNC     (HW_EVENT_IRQ_BASE +  5) /* VSync */
Index: linux/arch/sh/include/mach-se/mach/se7724.h
===================================================================
--- linux.orig/arch/sh/include/mach-se/mach/se7724.h
+++ linux/arch/sh/include/mach-se/mach/se7724.h
@@ -37,7 +37,7 @@ 
 #define IRQ2_IRQ        evt2irq(0x640)
 
 /* Bits in IRQ012 registers */
-#define SE7724_FPGA_IRQ_BASE	220
+#define SE7724_FPGA_IRQ_BASE	(220 + 16)
 
 /* IRQ0 */
 #define IRQ0_BASE	SE7724_FPGA_IRQ_BASE
Index: linux/arch/sh/kernel/cpu/sh3/entry.S
===================================================================
--- linux.orig/arch/sh/kernel/cpu/sh3/entry.S
+++ linux/arch/sh/kernel/cpu/sh3/entry.S
@@ -470,9 +470,9 @@  ENTRY(handle_interrupt)
 	mov	r4, r0		! save vector->jmp table offset for later
 
 	shlr2	r4		! vector to IRQ# conversion
-	add	#-0x10, r4
 
-	cmp/pz	r4		! is it a valid IRQ?
+	mov	#0x10, r5
+	cmp/hs	r5, r4		! is it a valid IRQ?
 	bt	10f
 
 	/*
Index: linux/include/linux/sh_intc.h
===================================================================
--- linux.orig/include/linux/sh_intc.h
+++ linux/include/linux/sh_intc.h
@@ -13,9 +13,9 @@ 
 /*
  * Convert back and forth between INTEVT and IRQ values.
  */
-#ifdef CONFIG_CPU_HAS_INTEVT
-#define evt2irq(evt)		(((evt) >> 5) - 16)
-#define irq2evt(irq)		(((irq) + 16) << 5)
+#ifdef CONFIG_CPU_HAS_INTEVT	/* Avoid IRQ0 (invalid for platform devices) */
+#define evt2irq(evt)		((evt) >> 5)
+#define irq2evt(irq)		((irq) << 5)
 #else
 #define evt2irq(evt)		(evt)
 #define irq2evt(irq)		(irq)