From patchwork Fri Nov 27 01:55:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 7709921 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4672A9F1D3 for ; Fri, 27 Nov 2015 01:56:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7DD28205F1 for ; Fri, 27 Nov 2015 01:56:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 965DF2061E for ; Fri, 27 Nov 2015 01:56:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753873AbbK0B4R (ORCPT ); Thu, 26 Nov 2015 20:56:17 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:46737 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753869AbbK0B4R (ORCPT ); Thu, 26 Nov 2015 20:56:17 -0500 Received: from reginn.isobedori.kobe.vergenet.net (p5254-ipbfp1403kobeminato.hyogo.ocn.ne.jp [114.152.48.254]) by kirsty.vergenet.net (Postfix) with ESMTPA id 7D5B825BEEA; Fri, 27 Nov 2015 12:56:00 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1448589360; bh=cXLaEsC689b026uXbCxC3SLJK/kqOR4jwyLPjEoqHcs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=A8QRApOyMHrIqqLIYSG9YUMnTNRg4GaBUkcn2LF01QVSFNYT/vRSIkM+G9JMq+x9j zT28BUUteX6nP3KidFjJ2NBY+feJdt1okcIxxULUt6zzorDpofa+N1Fz52gZhVubgX AUoJbgIi35BahwepEOPsTPijumrL6OfcpHu3qSa4= Received: by reginn.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id DA38D94081F; Fri, 27 Nov 2015 10:55:59 +0900 (JST) From: Simon Horman To: linux-sh@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Geert Uytterhoeven , Simon Horman Subject: [PATCH 15/15] ARM: shmobile: sh73a0 dtsi: Add L2 cache-controller node Date: Fri, 27 Nov 2015 10:55:58 +0900 Message-Id: X-Mailer: git-send-email 2.1.4 In-Reply-To: References: Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven Add the missing L2 cache-controller node, and link the CPU nodes to it. This will allow migration to the generic l2c OF initialization. The L2 cache is an ARM L2C-310 (r3p1), of size 512 KiB (64 KiB x 8 ways). Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index ff7c8f298f30..319551f0fcdb 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -28,6 +28,7 @@ reg = <0>; clock-frequency = <1196000000>; power-domains = <&pd_a2sl>; + next-level-cache = <&L2>; }; cpu@1 { device_type = "cpu"; @@ -35,6 +36,7 @@ reg = <1>; clock-frequency = <1196000000>; power-domains = <&pd_a2sl>; + next-level-cache = <&L2>; }; }; @@ -53,6 +55,18 @@ <0xf0000100 0x100>; }; + L2: cache-controller { + compatible = "arm,pl310-cache"; + reg = <0xf0100000 0x1000>; + interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&pd_a3sm>; + arm,data-latency = <3 3 3>; + arm,tag-latency = <2 2 2>; + arm,shared-override; + cache-unified; + cache-level = <2>; + }; + sbsc2: memory-controller@fb400000 { compatible = "renesas,sbsc-sh73a0"; reg = <0xfb400000 0x400>;