From patchwork Tue Oct 6 21:22:30 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Fleming X-Patchwork-Id: 52042 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n96LSd9H000820 for ; Tue, 6 Oct 2009 21:28:41 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758326AbZJFVYt (ORCPT ); Tue, 6 Oct 2009 17:24:49 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1758283AbZJFVYt (ORCPT ); Tue, 6 Oct 2009 17:24:49 -0400 Received: from 124x34x33x190.ap124.ftth.ucom.ne.jp ([124.34.33.190]:58136 "EHLO master.linux-sh.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758316AbZJFVYs (ORCPT ); Tue, 6 Oct 2009 17:24:48 -0400 Received: from localhost (unknown [127.0.0.1]) by master.linux-sh.org (Postfix) with ESMTP id D3AD76378B; Tue, 6 Oct 2009 21:22:56 +0000 (UTC) X-Quarantine-ID: X-Virus-Scanned: amavisd-new at linux-sh.org X-Amavis-Alert: BAD HEADER, Duplicate header field: "In-Reply-To" Received: from master.linux-sh.org ([127.0.0.1]) by localhost (master.linux-sh.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id kmTqguvGRLLa; Wed, 7 Oct 2009 06:22:56 +0900 (JST) Received: from localhost (82-38-64-26.cable.ubr06.brad.blueyonder.co.uk [82.38.64.26]) by master.linux-sh.org (Postfix) with ESMTP id 196B163784; Wed, 7 Oct 2009 06:22:55 +0900 (JST) From: Matt Fleming To: Paul Mundt Cc: linux-sh@vger.kernel.org Subject: [PATCH 10/14] sh: Remap physical memory into P1 and P2 in pmb_init() Date: Tue, 6 Oct 2009 22:22:30 +0100 Message-Id: X-Mailer: git-send-email 1.6.3.3 In-Reply-To: <74c586207600f78a4fa0bd080917bea1c5402f82.1254861984.git.matt@console-pimps.org> References: <1db0a1123393575aec324e0d808b6369f9837fe4.1254861984.git.matt@console-pimps.org> <22db0c702ba4b19699c05c38c26a6061bd0bbf40.1254861984.git.matt@console-pimps.org> <522679ccc33da57080deaa75f23dc5d6b782dbba.1254861984.git.matt@console-pimps.org> <014aa11fe1891ca085d72b8b6fb56703b7637a8b.1254861984.git.matt@console-pimps.org> <46a9d1e2f3461c917c9f43e512bd25eced531695.1254861984.git.matt@console-pimps.org> <74c586207600f78a4fa0bd080917bea1c5402f82.1254861984.git.matt@console-pimps.org> In-Reply-To: References: Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 5be45ea..0cf2a57 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -246,7 +246,7 @@ void __iounmap(void __iomem *addr); static inline void __iomem * __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) { -#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) +#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB) unsigned long last_addr = offset + size - 1; #endif void __iomem *ret; @@ -255,7 +255,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) if (ret) return ret; -#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) +#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB) /* * For P1 and P2 space this is trivial, as everything is already * mapped. Uncached access for P1 addresses are done through P2. diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c index e098ec1..9a8403d 100644 --- a/arch/sh/mm/consistent.c +++ b/arch/sh/mm/consistent.c @@ -85,7 +85,7 @@ EXPORT_SYMBOL(dma_free_coherent); void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { -#ifdef CONFIG_CPU_SH5 +#if defined(CONFIG_CPU_SH5) || defined(CONFIG_PMB) void *p1addr = vaddr; #else void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr); diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c index a3c0dfa..f13a18c 100644 --- a/arch/sh/mm/pmb.c +++ b/arch/sh/mm/pmb.c @@ -38,26 +38,6 @@ static void __pmb_unmap(struct pmb_entry *); static struct pmb_entry pmb_entry_list[NR_PMB_ENTRIES]; static unsigned long pmb_map; -static struct pmb_entry pmb_init_map[] = { - /* vpn ppn flags (ub/sz/c/wt) */ - - /* P1 Section Mappings */ - { 0x80000000, 0x00000000, PMB_SZ_64M | PMB_C, }, - { 0x84000000, 0x04000000, PMB_SZ_64M | PMB_C, }, - { 0x88000000, 0x08000000, PMB_SZ_128M | PMB_C, }, - { 0x90000000, 0x10000000, PMB_SZ_64M | PMB_C, }, - { 0x94000000, 0x14000000, PMB_SZ_64M | PMB_C, }, - { 0x98000000, 0x18000000, PMB_SZ_64M | PMB_C, }, - - /* P2 Section Mappings */ - { 0xa0000000, 0x00000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, - { 0xa4000000, 0x04000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, - { 0xa8000000, 0x08000000, PMB_UB | PMB_SZ_128M | PMB_WT, }, - { 0xb0000000, 0x10000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, - { 0xb4000000, 0x14000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, - { 0xb8000000, 0x18000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, -}; - static inline unsigned long mk_pmb_entry(unsigned int entry) { return (entry & PMB_E_MASK) << PMB_E_SHIFT; @@ -156,13 +136,7 @@ static void __uses_jump_to_uncached clear_pmb_entry(struct pmb_entry *pmbe) unsigned int entry = pmbe->entry; unsigned long addr; - /* - * Don't allow clearing of wired init entries, P1 or P2 access - * without a corresponding mapping in the PMB will lead to reset - * by the TLB. - */ - if (unlikely(entry < ARRAY_SIZE(pmb_init_map) || - entry >= NR_PMB_ENTRIES)) + if (unlikely(entry >= NR_PMB_ENTRIES)) return; jump_to_uncached(); @@ -293,28 +267,30 @@ static void __pmb_unmap(struct pmb_entry *pmbe) int __uses_jump_to_uncached pmb_init(void) { - unsigned int nr_entries = ARRAY_SIZE(pmb_init_map); - unsigned int entry, i; - - BUG_ON(unlikely(nr_entries >= NR_PMB_ENTRIES)); + unsigned int i; + long size; jump_to_uncached(); /* - * Ordering is important, P2 must be mapped in the PMB before we - * can set PMB.SE, and P1 must be mapped before we jump back to - * P1 space. + * Insert PMB entries for the P1 and P2 areas so that, after + * we've switched the MMU to 32-bit mode, the semantics of P1 + * and P2 are the same as in 29-bit mode, e.g. + * + * P1 - provides a cached window onto physical memory + * P2 - provides an uncached window onto physical memory */ - for (entry = 0; entry < nr_entries; entry++) { - struct pmb_entry *pmbe = pmb_init_map + entry; + size = pmb_remap(P2SEG, __MEMORY_START, __MEMORY_SIZE, + PMB_WT | PMB_UB); + BUG_ON(size != __MEMORY_SIZE); - __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, entry); - } + size = pmb_remap(P1SEG, __MEMORY_START, __MEMORY_SIZE, PMB_C); + BUG_ON(size != __MEMORY_SIZE); ctrl_outl(0, PMB_IRMCR); /* PMB.SE and UB[7] */ - ctrl_outl((1 << 31) | (1 << 7), PMB_PASCR); + ctrl_outl(PASCR_SE | (1 << 7), PMB_PASCR); /* Flush out the TLB */ i = ctrl_inl(MMUCR);